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TPS65987DDJ: Is I2C interface compatible with 1.8V logic levels?

Mehmet Fide
Prodigy 101 points
Part Number: TPS65987DDJ

Hi,

We have an ARM processor based application which needs to control TPS65987DDJ through I2C lines. But the processor's IOs support only 1.8V. It was not clear to me in the datasheet whether TPS65987DDJ's I2C lines are directly compatible with 1.8V logic levels. So here are my questions:

1. Can I connect our host processor's I2C lines directly without any level shifter to TPS65987DDJ's I2C lines?

2. Our host processor's I2C bus acts as a master (produces clock). The host processor should be able to send some commands like "Switch to Source" or "Switch to Sink" mode like we have it in configuration tool. Also in the future we may need to upgrade external flash content through TPS65987DDJ. In this case it is confusing which I2C bus of the TPS65987DDJ should be used. It has 3 buses, called I2C1, I2C2 and I2C3. I2C3 is always master, obviously that is not the one. I2C2 is indicated as always slave, as I understand we can use it directly as evaluation board that we have did. but I wonder if there is any slave functionality that we can do through I2C1 which is by default slave (but can be configured as master, which we don't want that) but can not do with I2C2?

Thanks.

  • 0
    TI__Mastermind 37855 points

    Hi Mehmet,

    [1] Yes, the I2C lines are open drain and can support 3V3 and 1V8 logic levels. Check section 6.14 for more information.

    [2] No, both I2C lines will have the same functionality in each case, you can read section 8.3.11 in the datasheet for more information.

    Thanks and Regards,

    Chris

  • 0 in reply to Christopher Lim1
    Prodigy 101 points

    Hi Chris,

    [1] please see the tables below from the datasheet section 6.13 and 6.14 which I found it confusing and why I asked the question here. If I tied SCL and SDA pullups to LDO_1V8 instead of LDO_3V3 to make it compatible with our host controller, what would be the logic-high voltage when both LDO_1V8 and LDO_3V3 are available in the system? There are three different values, one doesn't comply (2.31V).

    [2] So what I understand from you that connecting I2C2 slave port to our host controller would be sufficient to control TPS65987DDJ and update the content of the SPI flash connected to the PD. Is that right?

  • +1 in reply to Mehmet Fide
    TI__Mastermind 37855 points

    Hi Mehmet,

    [1] All the devices are set to the LDO1V8 thresholds which work for both pull-up voltages. Disregard the LDO_3V3 thresholds.

    [2] Yes

    Thanks and Regards,

    Chris

  • +1 in reply to Christopher Lim1
    Prodigy 101 points

    Hi Chris,

    Thank you for the confirmation. I'm going to kick out the all level shifter FETs on I2C bus in our schematics. I believe that this information should be eventually indicated clearly in the datasheet.