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OP-Amp buffer

Arun Patil
Prodigy 60 points
Other Parts Discussed in Thread: TXU0101, SN74AUP1G17, OPA863

1MHz, 3.3v square wave (clock) with 50% duty cycle, can its amplitude be reduced to 2.7v using an op-Amp buffered powered with 2.8V single ended power supply?

  • 0
    Guru 316690 points

    A square wave is a digital signal. The simplest way to reduce the voltage is a logic voltage translator (e.g., TXU0101), or a simple logic buffer with overvoltage-tolerant inputs (e.g., SN74AUP1G17).

    How large is the load on the output?

  • 0 in reply to Clemens Ladisch
    Prodigy 60 points

    In a chemical process plant, a level controller module gives 1 MHZ 3.3v clock signal when everything is functioning fine, and this clock is used for synchronization. If there is any failure, level controller module disables the clock and outputs DC voltage 0 to 2.5V depending on the chemical level inside the tank when the failure occurs. If we use a op-Amp voltage follower that can chop off the 1MZ clock amplitude to 2.7V then we will be able to process DC voltage levels (errors) and clock pulse distinctively and hence need a simple (least hardware) circuit that will spit out the clock with reduced amplitude and when DC voltage is present (in absence of clock), there will not be any amplification or attenuation. Using voltage translator will make some of the error voltage levels as low output and some as high output. 

  • 0 in reply to Arun Patil
    Guru 316690 points

    Yes, to be able to handle the DC signal, you indeed need an opamp.

    Use any rail-to-rail opamp with a very high slew rate, e.g., OPA863. Use series resistors in front of the inputs to limit the ESD diode clamp currents to much less than 10 mA.