TUSB7320: Cannot connect USB 2.0 devices

Masahito Takei

Part Number: TUSB7320

There are cases where the USB 2.0 connection does not work when the power is turned on after the power has not been turned on (for about 1 hour or more).
2 out of 1000 units have this case.

・There is no data output of PCI Express of TUSB7320, and it does not link up.
・The connection sequence to the USB device does not start.
・The USB 3.0 port is unused.

I have confirmed that the power, clock, and reset signals are output according to the sequence described in the datasheet.

Any ideas why the USB connection doesn't work?
Also, if there is a sequence that should be confirmed other than the sequence described in the datasheet, please let us know.

over 2 years ago

0 Brian Zhou over 2 years ago

TI__Guru*** 146535 points

Masahito:

What is relationship between 1.1v and 3.3v?

Regards

Brian

0 hisashi yoda over 2 years ago in reply to Brian Zhou

Intellectual 640 points

Thank you for your response.

I am working with Mr. Masahito.

You are asking about the relationship between 3.3V and 1.1V, are you asking about boot order?

0 Brian Zhou over 2 years ago in reply to hisashi yoda

TI__Guru*** 146535 points

Yes, it's better to take waveform.

Regards

brian

0 Masahito Takei over 2 years ago in reply to Brian Zhou

Intellectual 300 points

Brian

The waveform when the problem occurs is shown below. It is the waveform of the same timing even in normal operation. The green waveform is +3.3V and the yellow waveform is +1.1V.
Is there something wrong with the relationship between the +3.3V and +1.1V waveforms?

Regards

Masahito

0 Brian Zhou over 2 years ago in reply to Masahito Takei

TI__Guru*** 146535 points

Can you take waveform with GRST and PEARST as well?

Are you able to adjust 3.3v and 1.1v ramp ?

can you send schematic as well?

Regards

Brian

0 Masahito Takei over 2 years ago in reply to Brian Zhou

Intellectual 300 points

Brian

GRST and PERST waveforms were acquired separately.

I would check if the 3.3V and 1.1V ramp are adjustable.
What is the better relationship between 3.3V and 1.1V ramp?

The peripheral circuit diagram of TUSB7320 is shown below.

Regards

Masahito

0 Brian Zhou over 2 years ago in reply to Masahito Takei

TI__Guru*** 146535 points

Masahito:

1.1v looks pretty steep, 3.3v ramp looks ok.

Do you have AC cap on PCIe_TX0?

Are these two units failed consistent?

Regards

Brian

0 Masahito Takei over 2 years ago in reply to Brian Zhou

Intellectual 300 points

Brian:

Both PCIe TX and RX have AC caps.
I'm checking to see if the two units are consistently failing.
Are there any cases where normal operation is not possible due to the influence of a 1.1v lamp?

Regards

Masahito

0 Brian Zhou over 2 years ago in reply to Masahito Takei

TI__Guru*** 146535 points

Our host device is not very sensitive to power ramp.

i just wonder these devices may real failure and need to send back for ATE test.

Regards

brian

0 hisashi yoda over 2 years ago in reply to Brian Zhou

Intellectual 640 points

Brian:

Thank you for your answer.
I am going to use it as an example.

Where can the ATE test be performed?
Can your company implement it?

Is there anything I should check before doing an ATE test?

Please let me know if there is any way to check whether te TUSB7320 has started normally.
For example, if there is a way to measure the behavior of a certain pin, please let me know.

Regards

Yoda

0 Brian Zhou over 2 years ago in reply to hisashi yoda

TI__Guru*** 146535 points

Yoda:

pls. check with local CQE how to handle customer return.

since there is PCie link issue, not much you can do on your side. just make sure place devices in ESD bag.

Regards

Brian

0 Masahito Takei over 2 years ago in reply to Brian Zhou

Intellectual 300 points

Brian:

We check for local CQE.

I checked the PCI Express waveform of the TUSB7320 when the reset was released. In normal operation, data is output after reset is released, but in the event of a failure, data is not output. Please let me know if you have any idea about this difference.

Normal operation