I am working with the DP83822 PHY connected to a Cyclone5 FPGA that has 2 MACS. When I use uboot to download an image to the board and boot that image, the ethernet performance as measured by iperf3 is 95-100 Mbps. But if the board is rebooted or power cycled, it will run at between 35 and 50 Mpbs.
I have dumped the PHY registers after bootup for both cases, and insured that the configuration is the same. I looked at the RX clock cycles and they are the same in bot cases.
Are there other registers or settings other than the PHY that could be at play? It seems that when uboot initializes the PHY for a download, it always works to spec, but if uboot simply starts the kernel, it is not touching the PHY configuration, and whatever it is touching is not modified by the kernel driver.
