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TCAN4550-Q1: question about clock

Part Number: TCAN4550-Q1

hi,

《slla549Clock Optimization and Design GuidelinesPage4

questions are:

more details about clock input detection block: how long the OSC2 lower then threshold will trigger block? does it accumalte or not? when it detect that?

from datasheet, we can only see OSC1 TERMINAL AND CRYSTAL SPECIFICATION, no info about OSC2, are the same requirement?

thank you

b&r

yuan

  • Hi Yuan,

    Your first question is difficult to answer and there is not any additional specifications or numbers that I can provide at this time.

    The Clock Input Detection block is essentially a 1uA current source and a comparator that has a detection threshold between 90mV (min) and 150mV (max). But it will typically be between 100mV and 110mV for most devices.  This detection block was designed to be used at the device startup and detect the DC voltage created by the 1uA of current sourced out the OSC2 pin.  If the OSC2 pin was connected to GND, as required for single-ended clock mode, the OSC2 pin will have a low voltage, otherwise, the pin will have a higher voltage.

    When a crystal oscillator is used and an oscillating waveform is applied on the OSC2 pin, the waveform should remain above the 150mV threshold to ensure stable operation. If the waveform crosses below this threshold, the comparator may not immediately trigger due to the waveform rising back above the threshold quickly.  Several factors including the parasitic board, pin,and external load load capacitance, ESR of the crystal and peak-to-peak amplitude of the waveform, oscillation frequency etc. will alter this timing. 

    There will be a charging and discharging of the capacitance through both the oscillation waveform in the crystal and the internal 1uA current source that controls the actual voltage at the input to the internal comparator.  Due to the unique conditions for each application and components used, the amount of time the signal can remain below the 150mV threshold may vary and a specific value can't be provided.

    To your second question about the OSC1 and OSC2 pin specifications in the datasheet, No, these are not the same requirements.  The OSC1 pin when used with a Crystal and this pin is Output of the transimpedance amplifier which sources current to the crystal oscillator.  In this mode the OSC2 pin is used as an Input pin to detect the oscillation waveform to use as an input clock.

    When a Single-Ended clock is used instead of a crystal, the OSC2 pin is grounded which disables the transimpedance amplifier sourcing current out of the OSC1 pin and allows the OSC1 pin to instead be used as an Input pin for the single-ended clock.  The datasheet specifications for OSC1 pin (VIH, VIL) are related to the single-ended clock values.

    The Fosc1 and tDC generally apply to both types of clock signals.  The ESR spec only applies to crystals.

    The only real OSC2 consideration is that if the pin voltage is less than 150mV (as in a grounded pin) the device may switch to single-ended clock mode and disable the transimpedance amplifier.  If a crystal is used, the OSC2 pin voltage should stay above 150mV to avoid the risk of switching to single-ended clock mode and disrupting the device clock.

    Regards,

    Jonathan