Hi,
My customer has two following questions of XIO2001 RESET on secondary bus.
- When they writes 0 on SRST bit of "Bridge Control Register", XIO2001 asserts Low on PRST pin ASAP, regardless of PCI status (ex. during transferring data). If they wants to de-assert HIGH on PRST pin, they writes 1 on SRST bit ASAP. Is my understand correct?
- If yes, how much time does it take from writing 0 to asserting PRST pin? Also, does this timing synchronize with PCI Clock? Please advise us.
Thanks and best regards,
M.HATTORI.