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DS90UB941AS-Q1: Pattern internal timing

Part Number: DS90UB941AS-Q1

Dear expert,

Customer SoC work correctly to send video o UB941-UB948 and show on screen with below timing.

h_back_porch:120;

h_front_porch:60;

h_pulse_width:60;

v_back_porch:10;

v_front_porch:26;

v_pulse_width:2;

resolution 1920x1080;

External PCLK 140MHz

DSI clk 420MHz

Then they want to try below pattern setting with internal timing. The phenomena is very strange.

With DISABLE_DSI set to 1 in UB941 register 0x1 to disable video from SoC, screen is black with below pattern gen code in either UB941 or UB948.

With normal DSI video data from SoC, color bar from pattern can be shown on screen with below pattern gen code in UB941.

With normal DSI video data from SoC, color bar from pattern can be shown on screen with below pattern gen code in UB948 only for the first several seconds, then switch to normal video from SoC on screen.

I already set UB941 pattern WriteI2C(0x65,0xc) to use internal timing. Why it seems still rely on DSI?

If video is sent from both SoC and Pattern Gen(either UB941 or UB948), which one will be shown on screen?

Thanks

#Patgen 1920x1080@60Hz internal timing with external 140MHz PCLK

WriteI2C(0x66,0x07) # PGAFS1 AHW

WriteI2C(0x67,0x80) # AHW 1920

WriteI2C(0x66,0x08) # PGAFS2 AVW

WriteI2C(0x67,0x87) # AHW 1920 AVW 1080

WriteI2C(0x66,0x09) # AVW

WriteI2C(0x67,0x43) # AHW 1920 AVW 1080

WriteI2C(0x66,0x04) # PGTFS1 THW

WriteI2C(0x67,0x70) # THW 2160=0x870

WriteI2C(0x66,0x05) # PGTFS2 TVW

WriteI2C(0x67,0xe8) # TVW 1118 0x45E

WriteI2C(0x66,0x06) # PGTFS3 TVW

WriteI2C(0x67,0x45)

WriteI2C(0x66,0x0c) # HBP 120

WriteI2C(0x67,0x78)

WriteI2C(0x66,0x0d) # VBP 10

WriteI2C(0x67,0xa)

WriteI2C(0x66,0x0a) # HSW 60

WriteI2C(0x67,0x3c)

WriteI2C(0x66,0x0b) # VSW 2

WriteI2C(0x67,0x2)

WriteI2C(0x66,0x0e) # VS_HS_polarity positive

WriteI2C(0x67,0x0)

WriteI2C(0x65,0xc) # internal timing with external PCLK

WriteI2C(0x64,0x5) # enable pattern