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DS90UB960-Q1: Explanation of BCC Status for safety option

Harry Shin1
Expert 6860 points
Part Number: DS90UB960-Q1


Hello Team,

I am preparing promotion to customer and particularly customer is interested in Safety.

One question of safety option is if FPD can detect I2C error like when Master at DES side access DES or SER or remote device at SER and vice an versa.

I understand FPD doesn't have method to detect I2C error for those cases.

but I found some option for BCC but I am sorry that I couldn't understand what they are even there is description.

My question is 

1) if we have I2C error detection solution.

2) what is meaning of BCC I2C slave/BCC I2C master??

Thank you

  • 0
    TI__Genius 11315 points

    Hi Harry,

    1. Yes, it is possible to detect I2C errors across the bi-directional control channel (BCC). Register 0x4D (BCC_ERROR) is an error flag, and bit 3 can indicate that an error has been detected on the BCC (if the BCC_EN_ENH_ERROR bit in 0x46 has been set to 1). The specific BCC error condition that has been detected is defined in register 0x47 BCC_STATUS. This register provides more details about any I2C errors that may have occurred. 
    2. The bi-directional control channel (BCC) is the link between the SER and DES. The DES is only capable of detecting errors in the data being sent from the SER->DES or if the SER sends alarm bits to the DES. Therefore, the terms indicate whether the device across the BCC is the I2C slave or the I2C master. For example, the BCC_SLAVE_ERR bit indicates that an error occurred over the link that caused a loss of lock, while the 960 was waiting for an ACK response from an I2C slave over the BCC.

    Regards,

    Cindy

  • 0 in reply to Cindy Li
    TI__Expert 6860 points

    Hello Cindy,

    For question 1, is this dedicated I2C error detection option?? or it includes other DTC information.

    because customer is question if this option is only for I2C DTC.

    Thank you.

  • 0 in reply to Harry Shin1
    TI__Genius 11315 points

    Hi Harry,

    BCC_ERROR in 0x4D is not solely for I2C because the BCC includes all control data which includes I2C and GPIO data.

    Regards,

    Cindy

  • 0 in reply to Cindy Li
    TI__Expert 6860 points

    Hello Cindy,

    I misunderstood BCC is only Back channel. but it seems Forward channel and back channel both.

    BTW, I am still not clear about meaning of BCC status.

    Can you help have example for BCC_MASTER_ERR??

    and There is BCC sequence error. what sequence error this register detect??Does it mean dedicated bits error on control data??

    Thank you.

  • 0 in reply to Harry Shin1
    TI__Genius 11315 points

    Hi Harry,

    Right, the bidirectional control channel transfers programming and control data bidirectionally over the same differential pair used for video data. The DES can only detect BCC errors that it receives from the SER, so the BCC_ERROR bit in 0x4D means that a BCC error has been detected on an RX port of the 960. The specific condition is described in BCC_STATUS.

    For BCC_MASTER_ERR, let's say the 960 sends an I2C command to an I2C Master located across the cable link. BCC_MASTER_ERR means that an error occurred while the 960 was waiting for a response and the I2C master was active on the control channel. It could have been a lock error, BCC sequence error, or BCC CRC error that took place in the middle of an I2C transaction.

    The bidirectional control channel frame received over the FPD-Link III forward channel includes an encoded sequence to add an extra layer of error checking. If the DES detects that the sequence has an error, then BCC_SEQ_ERROR will be flagged. This indicates there was an error in the FC signal recovery.

    Regards,

    Cindy