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AM26C32: Reliable fail-safe

ArTzy
Genius 17425 points
Part Number: AM26C32

Hello Experts,

We have a question about AM26C32 fail safe feature.

Cx configuration is shown below:

There are two data channels that fed two AM26C32 inputs. One of this channel is driven while the other is in high impedance state. At the same time, one line receiver is enabled while the other is enabled (this should not interfere with the input fail safe).

[1] What is reliable the fail-safe when two inputs are connected together like the attached circuit?

[2] Could the input impedance (of the circuit reported at page 8 of the AMC32 datasheet) load the fail safe network of the enabled line receiver while the bus is in high impedance state and perturb the output high state?

Thank you for your support.

  • +1
    TI__Guru 52172 points

    Hi Archie,

    The failsafe for this device will output high when the input differential voltage is idling / open - i.e. the voltage is zero volts and not being actively driven to 0v. 

    1. The high impedance load shouldn't negatively impact fail-safe. If the bus is idling (apprx. 0V) or a wire break causes an open the failsafe circuitry should still work.

    2.It will load the bus - but the failsafe protects against idle and open buses on this device - which means if the device detects a idle/open bus it will output high - its the bus state that matters. There is internal bias circuitry that will create a "high" voltage in that case.

    Please let me know if you have any other questions!

    Best,

    Parker Dodson