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TUSB7340 Reference Schematics - Wrong USB Connector Assignments?

Joachim Jansen
Prodigy 70 points
Other Parts Discussed in Thread: TUSB7320, TUSB7340

With respect to the schematics contained in SLLU149–June 2011 page 56, there are mixed-up signals on J1 - J4: Signals TXP are wired to connector SSTXN, and vice versa. The same issue is with J1 and J3, signals RXP are wired to connector SSRXN and vice versa. Also wrong in TUSB7320/TUSB7340 EVM User's Guide SLLU146 April 2011.

More important: Common mode filters of the same type are shown in these schematics with USB2 D+/D-, and USB3 SSTX+/SSTX-, but are not provided for SSRX+/SSRX-? Intel has on their CRB schematics common mode chokes on all signal pairs, including SSRX+/SSRX-, different parts for USB2 and USB3 signals.

The TI schematics show TVS elements attached to SSRX+/SSRX- only? Intel has in use TVS components on all signal pairs, different parts for USB2 and USB3 signals.

  • 0
    TI__Intellectual 2995 points

    The USB3 spec allows for polarity inversion of the SS TX and RX to assist with board layout.  This is documented in the USB3 spec, our data sheet, and our implementation guide.

     

    We did not add common mode chokes on the RX since EMI is not as big of a concern on the RX link.  This is a BOM savings for our device.

     

    the chokes on the SS TX and USB2 DP/DM have ESD protection diodes in them.  Since we did not add a choke to the SS RX for BOM savings we added its own ESD protection.