DS90UB926Q-Q1: Can the PCLK output of DS90UB926Q be set with different frequencies？

Hi Ansel, 

Are you using a partnering FPD-Link serializer with this device? The timing is typically passed from a video source to the serializer and then a deserializer (in this case the 926). 

Please see the below app note for more information on testing our devices to drive displays. 

Exploring the Int Test Pattern Generation Feature of FPDLink III IVI Devices

Best,

Shu

HI SHU:

     是的，主机侧串行器过来的FPD-LINK数据，我们这侧使用了926解串，这时候926输出的PCLK频率是否可以通过寄存器设置成8MHZ输出呢？

你提供的《Exploring the Int Test Pattern Generation Feature of FPDLink III IVI Devices》这个文档好像是讲解BIST模式，在BIST模式下926输出的PCLK频率是可以设置的。

Hi Ansel, 

If connected to a serializer, the PCLK is driven by the serializer side, to change the PCLK on the 926, the serializer side PCLK would need to change. 

The App Note I attached is for pattern generation which will generate an image at the desired pclk (at serializer side OR deserializer side) to drive a display. 

Best,

Shu