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TUSB8044A: Power Up Timing between GRSTz, VDD33 and VDD

Part Number: TUSB8044A


Dear Specialists,

My customer is considering TUSB8044A and has a question.

I would  be grateful if you could advise.

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The data sheet P12 has the following description.

<<<As long as GRSTz is de-asserted after both supplies are stable, there is no power-on relationship between VDD33 and VDD.

If GRSTz is only connected to a capacitor to GND, then VDD must be stable minimum of 10 µs before VDD33.>>>

Is it possible to understand that if GRSTz is H level, there is no problem even if VDD33 rises before VDD?

(The td1 in Figure 1 of the data sheet P.13 is min0, but is there any problem if it becomes negative?

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I appreciate your great help in advance.

Best regards,

Shinichi