DS160PT801: Cascading DS160 and MUX4412

Hi Kai,

1. I do not see an issue cascading the TMUXHS4412 with the retimer (DS160PT801).
2. Could you clarify how your setup would look with two TMUXHS4412 devices cascaded? Would you be looking at something like [SOC - 4412 - 4412 - DS160PT801] ...?

Best,

David

Greetings David,

thanks for swift reply - much appreciated.

## Explanation

Yes, correct, the dual MUX scenario would look like this:

PCB1:[SOC - MUX4412 - MUX4412 - DS160]      <-0.5m G5 capable cable->        PCB2:[DS160 - MUX4412 - MUX4412 - SOC]

Our understanding is that the muxes, essentially, introduce a z^-1 and the retimer wouldnt even notice if lanes run through muxes or not.

Attenuation might be a thing, but two muxes on a PCB shouldnt attenuate too much for a retimer to be able to recover.

And of course, all lanes leading from SOC to retimer must get subjected to the same z^-1 (meaning same tracelengths and identical muxes).

## FYI

Small detail: We intend to run SRIS (separate refclock with SSC)

Small correction to original post: G4 x2 (not x4).

a) to avoid yet another pair of wires in the cable and

b) to keep the count of muxes manageably low or else that (2 lanes + 1CLK) would mean 3x 2:1 muxes

## Questions

Three small additional questions if I may:

1. how much deskew can the DS160PT801 do ? The DS isnt detailing that exactly.

2. we assume the 2x4 bifurcation mode is to be understood as 'up to', and it would include 2x2 bifurcation as well, right ? (blue , red)

3. do we still need to provide clock at least on input side to DS160 in case of SRIS mode - or is DS160 flying entirely clock-less ? (blue)

Thanks !

BR,

- Kai

Hi Kai,

The dual 4412 + retimer setup is OK from an attenuation perspective.

1. More information is available in the full datasheet..
2. 2x4 bifurcation supports a x2 link.
3. The 100MHz REFCLK is required for each retimer. SRIS mode is allowed.

I believe the full datasheet will give you further insight on some of your questions. Please request access to the full datasheet under the DS160PT801 page (under the 'Request more information' section): https://www.ti.com/product/DS160PT801

Best,

David

Thank you David,

Ive requested the full datasheet right now.

One follow up to item 3, just to be perfectly sure:

o we do have to provide refclock from SOC to DS160 even in case DS160 is switched to SRIS mode ?

o do we have to pipe the refclock through equivalent muxes (or delay in other form, e.g. longer trace lengths) or can refclk simply bypass the muxes ?

Thanks !

Hi Kai,

I believe full datasheet and design document access should now be granted.

• Valid reference clock topologies are referenced in the datasheet.
• REFCLK does not have to be supplied to muxes.

Best,

David

Hi David,

yes, correct, full datasheet access got granted. Looked it up this morning. 

1. found in full datasheet. Thanks !

4. REFLCLK question was more in regards to 'through' (not 'to') the muxes. To avoid too much skew between lanes (through muxes) and clock (if bypassing the muxes)

Thanks !

Hi Kai,

Please refrain from discussing secure documentation on public E2E forums. I have deleted one image and two bullet points from your previous reply. I am in the process of checking to see on those additional questions.

• I do not see an issue in routing REFCLK directly to the retimer.

Best,

David

Hi David,

got it, sure, makes sense ! Apologies, I compared against the non-full datasheet, you are right, that image wasnt included in that one.

Excellent, thanks for looking into that for us !

BR,

- Kai