Hello guys,
I'm currently configering a TCAN4550 Tx Buffer, but I have some questions regarding the setup.
Does the FIFO/Queue configuration also affect the dedicated buffers?
If I use the FIFO configuration, is it enough to write the new message to the next available buffer (TXFQS.TFQPI) and set the corresponding bit in the TXBAR? Or should I use the Get index (TXFQS.TFGI) to trigger the next message in the series?
Best regards
Michel
Hi Michael,
It's possible to use only the dedicated buffers, FIFO, or Queue. But it is also possible to have a mix of dedicated buffers and FIFO, or a mix of dedicated buffers and Queue. So in that regards, I would say yes the FIFO/Queue configuration can affect the dedicated buffers.
The "MCAN" CAN FD controller used in the TCAN4550 was developed by Bosch and I would refer you to section 3.5 of the MCAN User's Manual for a detailed configuration overview. Section 3.5.3 specifically discusses the TX FIFO. If you are interested in a mixed mode use with dedicated buffers and either the FIFO or Queue, these are discussed in section 3.5 as well.
The FIFO Get Index is used internally by the MCAN controller to determine what TX buffer element contains the next element to send. It is also used to determine if the FIFO is full by checking to see if the Put Index value wraps around to equal the Get Index value. If this occurs an interrupt is set. You should not need to use the Get Index in any way other than possibly verifying you are not going to overwrite a message still waiting to be transmitted with a new message you want to transmit. But the TX FIFO Free Level is generally used for this purpose.
When adding messages, you should add the message to the element indicated by the Put Index and then set the corresponding TXBAR bit. If multiple messages are set, then you would put the messages in the FIFO starting at the Put Index, and then set the TXBAR bits for all buffer elements you have just filled.
Regards,
Jonathan
