Hello team,
Can you give your knowledge for my support?
<Question>
I have question on timing requirements of VDDIO. Datasheet says VDDIO should be powered up within 100ms from less than 0.3V.
1. Is there any reason to specify starting from less than 0.3V?
2. What problems can occur if conditions above 0.3V persist for 100ms?
<Background>
My customer is using two DP83822I (PHY addresses 1 and 2). In rare cases(2/4000), only PHY address 1 is not detected by PHY address scan during initialization at power-on.
They looked VDDIO waveform. The result is 0.3V->1V: 1740ms, 1V->3.15V: 0.5ms.
Best regards,
Shotaro