Other Parts Discussed in Thread: DS110DF111
Hi, I would like to ask if the DS100BR111 redriver would be appropriate for supporting 10GBASE-R interfaces at an SFP+ port?
The 10 GBe signals are 10GBASE-KR from a 3U VPX general purpose processor (GPP), interfaces a backplane, traverses through a rear transition module (RTM) and terminates at an SFP+ port. A rough block diagram is shown below. I certainly have signal integrity concerns with insertion loss due to (4) 3U VPX connectors and trace lengths, but more importantly is that the link partner on the end of the fiber is expecting 10GBASE-R (no medium specified) with no FEC or auto-negotiation supported. I think a redriver solution may be suitable due to its protocol agnostic nature? If not, the other options I can think of are to use a separate FPGA or a -KR to SFI PHY chip to handle protocol translations.
I really appreicate any input on this.