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SN65DP159: I2C SRC and SNK connection if no I2C Interface is used

Patrick Dietl
Prodigy 10 points
Part Number: SN65DP159

Hi,

I will use the SN65DP159 for HDMI Input Interface to a Xilinx MPSoC FPGA.

The TMDS Data comes from a Sony Camera.

The camera do not support an I2C Interface.

I found the following note in the SN65DP159 datasheet:

Note 1: For applications where the GPU or Sink does not support clock stretching the DDC lines from the GPU/DP TX

should bypass the SCL_SRC and SDA_SRC but still connect to the SCL_SNK and SDA_SNK pins on the DP159.

The SCL_SRC and SDA_SRC pins must be pulled to ground. Note that if the GPU/DP TX cannot support the 5V

DDC lines from the connector, a level shifter is needed to step down the 5V signals to the voltage level the GPU/DP

TX can support.

If I understand this correctly the I2C_SRC interface has to pulled to GND and the I2C_SNK Interface has to be left unconnected.

Is this correct?

Thanks,

Patrick

  • 0
    TI__Genius 13310 points

    Patrick,

    The SNx5DP159 uses clock stretching for DDC transactions. As there are sources and sinks that do not perform this function correctly a system may not work correctly as DDC transactions are incorrectly transmitted/received. To overcome this, a snoop configuration can be implemented.

    The SDA/SCL from the source is connected directly to the SDA/SCL sink. Care must be taken when this configuration is being implemented as the voltage levels for DDC between the source and sink may be different, 3.3 V vs 5 V.

    The following document explains how to set the snoop configuration: https://www.ti.com/lit/ml/slla461/slla461.pdf?ts=1680185734605&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FSN65DP159

    A snippet from the document is as below:

    The SCL_CTL  and SDA_CTL or the I2C data and clock lanes are configured independently of snoop mode but will be configured based upon whether your design is in I2C or pin-strap mode.  

    Thanks,

    Zach