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DS125BR820EVM: The TMDS signals level were unnormal with DS125BR820 output，we need help, Thanks

Haidong Fang
Prodigy 70 points
Part Number: DS125BR820EVM
Other Parts Discussed in Thread: DS125BR820, TDP1204, TMDS1204

SCH for DS125BR820 

we use DS125BR820 as the redriver for HDMI2.1 TMDS/FRL output, the above picture is the SCH.

The main registers settings of DS125BR820 are in the following: 

       RDEXT  = 0x08;

       EQx    = 0x00;

       VOD    = 0xa8+6;

       VOD_DB = 0x00;

       SD_TH  = 0x00;

The inputs of DS125BR820 are the HDMI2.1 TMDS/FRL outputs which are from FPGA of Xilinx ZU7EV. And the outputs of  DS125BR820 are as the "HDMI" Source.

According to the TMDS principle, TMDS signals should be drived by the constant current source (10mA). Since at the SINK side of HDMI, the TMDS/FRL signals are pulled up to 3.3V with 50 ohms. If the TMDS siganls Vpp is 500mV,  The high level of the normal output of TMDS should be 3.3V, while the lower level should be 2.8V. 

Becasue DS125BR820 is also CML output, so the output should accord with the TMDS principle.

While in our outputs from  DS125BR820. The  high level of DS125BR820 output of TMDS is 3.55V, and the lower level is about 3.1V.  please refer to the picture.

The questions:  Are there any register settings or SCH problem of  our DS125BR820？ The level of TMDS from DS125BR820 in our application are different  from the normal TMDS ouput, Why? 

Thank you for your coming great support!

  • 0
    TI__Mastermind 19432 points

    Hi Haidong,

    The register settings seem reasonable. Could you clarify the VOD setting (0x8+6) as it's not clear whether the signal is being attenuated or if the gain is set to 1.

    I'm not familiar with HDMI in this context - is rx_detect necessary? if not, the 50ohm termination setting is sufficient.

    The reason for the output levels may be due to the AC coupling of the EVM output, which may change the DC biasing to 3.3V.

    Thank you,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 70 points

    We had confirmed that VOD setting （0x8+6） ，just as we set. That means VOD/VID=1;

  • 0 in reply to Haidong Fang
    TI__Mastermind 19432 points

    Hi Haidong,

    Thank you for clarifying. I will look into this further Monday 4/10 as today is U.S. holiday. In the meantime, please let me know if there are any connections on the transmitter end that may influence the DC biasing - as of now I only suspect the AC coupling on the EVM output to be a factor. 

    BR,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 70 points

    Hi, Evan. For SCH & PCB, just as SCH connection, there are no any other connections on the transmitter end. If the HDMI cable were connected. There are pulled up to 3.3V with 50 ohms at HDMI receiver side. We also test the HDMI output of other products with the same HDMI SINK (TV Receiver),  the DC bias is 2.8V.  While in our outputs from  DS125BR820, the DC bias is 3.3V.

  • +1 in reply to Haidong Fang
    TI__Mastermind 19432 points

    Hi Haidong,

    This behavior is likely due to the HDMI receiver expecting a DC coupled signal, while the DS125BR820 output is AC coupled. If possible, we recommend switching to a redriver designed for HDMI applications:
    https://www.ti.com/interface/hdmi-displayport-mipi/overview.html

    Please let me know if I can assist further with a device selection.

    Thank you,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 70 points

    Hi, EVan. Thank you for your great help. It seems we should use TMDS1204 or TDP1204 as the redriver of HDMI. For HDMI input or HDMI output, can we use the same device, for example TDP1204? What's the different between TMDS1204 and TPD1204. For DP output, can we also use TMDS1204 or TDP1204? 

  • 0 in reply to Haidong Fang
    TI__Mastermind 19432 points

    Hi Haidong,

    I'm not as familiar with our HDMI redriver portfolio. I've reached out to one of our teammates better suited to help you with this, please allow me around 2-3 days to get back to you on this.

    Thank you,

    Evan

  • 0 in reply to Evan Mayhew
    Prodigy 70 points

    Hi, Evan

     Thank you very mchu. Look forward to your reply, Thanks.

    Haidong

  • 0 in reply to Haidong Fang
    TI__Guru**** 157496 points

    Hi,

    For the difference between TDP1204 and TMDS1204, please refer to this app note, https://www.ti.com/lit/an/slla598/slla598.pdf, in particular, section 3 of the app note. You will have certain features gain or lose when selecting between TDP1204 and TMDS1204. For this design, I believe TDP1204 can be used. 

    For DP output, are we talking about HDMI or DP input?

    For HDMI input to DP output, you will have to use an active protocol converter. Unfortunately we do not have a solution in our product portfolio.

    For DP input to DP output, TDP1204 can support this mode but it has to be configured in linear mode.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 70 points

    HI， David

    Thank you for your reply.  And  I got the main difference between TMDS1204 and TPD1204.

    For our applicaiton.

    1. HDMI out: Video (TMDS or FRL) with HDMI  protocol were output from FPGA----> REDRIVER----->TO HDMI OUT inferface.

    Can both TMDS1204 and TPD1204 be used?  The difference is, if we use TMDS1204, I2C bus should use other DDC level shifter.

    Am I right?

    2. HDMI in: Inferface of HDMI In ----->REDRIVER---->Video (TMDS or FRL) with HDMI  protocol to FPGA.

    Is it same with HDMI out?

    3. For DP out:  Video/Audio data with DP protocol were output from FPGA----> REDRIVER----->TO DPOUT inferface.

    4. For DP in:  Inferface of DP In----->REDRIVER---->Video/Audio data with DP protocol to FPGA.

    For the applicaiton of 3 & 4, we also need the redriver. Which device are better？

     Look forward to your reply, Thanks.

    Haidong

  • +1 in reply to Haidong Fang
    TI__Guru**** 157496 points

    Haidong

    1. HDMI out: Video (TMDS or FRL) with HDMI  protocol were output from FPGA----> REDRIVER----->TO HDMI OUT inferface.

    Can both TMDS1204 and TPD1204 be used?  The difference is, if we use TMDS1204, I2C bus should use other DDC level shifter.

    Am I right?

    Correct, you would need an external DDC level shifter to shift between the HDMI 5V  power domain and the FPFA signal level domain.

    2. HDMI in: Inferface of HDMI In ----->REDRIVER---->Video (TMDS or FRL) with HDMI  protocol to FPGA.

    Is it same with HDMI out?

    Does FPGA have an internal buffer that can support the switching between the clock lane in HDMI1.4/2.0 to data lane 3 in HDMI2.1? If it does, then you can use TDP1204. If doesn't, then you need to use TMDS1204.

    3. For DP out:  Video/Audio data with DP protocol were output from FPGA----> REDRIVER----->TO DPOUT inferface.

    4. For DP in:  Inferface of DP In----->REDRIVER---->Video/Audio data with DP protocol to FPGA.

    For the applicaiton of 3 & 4, we also need the redriver. Which device are better？

    Does FPGA have a compliant DP output and do you plan to run DP compliance? If you don't, then you may want to use DP130 which can support DP1.2 5.4Gbps. If it does, then you may want to use DP141 which can support DP2.1 UHBR10 or DP142 which can support 8.1G DP1.4.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 70 points

    Hi, David

       Thank you for your great help. 

    Haidong