DP83869HM: Setting difference between Rev A and Rev B

Hello,

I understood about answer of Q2.
I have other questions for answer of Q1.

1-1.
>Instead now, this op code is now explicitly defined for all of the modes, Reg 0x1DF.
I understand answer of above, however, I have following question.

According to datasheet of Rev A, TI described that user need to write 0x1140 to Address 0x0000.
On the other hand, according to datasheet of Rev B, TI described that user need to write 0x1140 to Address 0x0C00.

My customer said that when write data to address 0x0000, it seems that same data will be applied to address 0x0C00 in case of using DP83869HM with rev A.
(Vice versa.)

However, TI changed description about register which 0x1140 should be writtern when TI changed datasheet from Rev A to Rev B.

Q1-1-1. In case of Rev A, is 0x0C00 shadow register of 0x0000 and changed treatment of this register when you update Rev B ?
(In case of Rev B, 0x0C00 is not shadow registert of 0x0000 ?)
Q1-1-2. If answer of above Q1-1-1 is "NO", could you please tell me how user distinglish standard register (0x0000) and extension(vendor define) register (0x0C00) ?
(Because, if user set address 0x0000 to something, same setting will be applied. in other words, I think user do not need to access extension(vendor define) register.)

Best Regards,

Hello,

Thank you for your reply.
I'm not sure whether 0xC00 is working as shadow register but I think behabior is similar so I wrote it.
Here is explanation about shadow register.

Hello,

Thank you for your reply.
I understand about section 9.4.9.1.
In other words, I understand address 0x0 and 0xC00 is not connected(related) from above section.
(If user want to access address 0x0, they just point out 0x0. And if user want to access address 0xc00, user need to set REGCR[4:0] and set ADDAR to point out 0xc00. Therefore access method is different.)

However, customer said as shown below.

>My customer said that when write data to address 0x0000, it seems that same data will be applied to address 0x0C00 in case of using DP83869HM with rev A.
(Vice versa.)

Could you re-confirm whether standard register (0x0 - 0x1F) is NOT related to extended register of related to fiber (register name is FX_xxx and Add 0xC00 to 0xC19) internally ?

Best Regards,

Hello,
>While it does appear that same data is set between 0x0 and 0xC00, these are independent registers from each other and must be set independently.
I recognize about above.
However, in fact customer said when they just set data to address 0x00, same data is applied to address 0xC00 as well.
So, this means when user set data which they want to write to address 0xC00, if something set data to address 0x0 after that, data of address 0xC00 is overwritten unintentionally. 
Could you understand our situation ?

Best Regards,

Hello,

>I then change register 0x0 to have 0x900, read back to confirm, and then read 0xC. That value does not change.
Good. I also expected this result. they are using Linux OS and use linux device driver.
So, I think something wrong operation is performed on this driver. I will ask customer again.

BTW, they are refering following driver information. But it seems that this driver only apply rev 1 (value of 0x03 is 0xa0f1).
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/dp83869.c

#define DP83869_PHY_ID 0x2000a0f1

Do you have plan to change device driver ? Or should customer response new revision by changing driver code themselves (commit by TI or customer ?)?

Best regards,

Hello,

The fix on the driver should be that there should be another #define which has the new PHY ID, 0x2000A0F3, and wherever there is a conditional referencing DP83869_PHY_ID, there should be a OR operation between the old and new device ID's. 

Sincerely,

Gerome

Hello,

I'm sorry let me re-confirm about below.

 I first read 0x0 and 0xC and they read out 0x1140 and 0x140, respectively. I then change register 0x0 to have 0x900, read back to confirm, and then read 0xC.

Is above "0xC" mistake of "0xC00" ?
(Actually, there is no disclosed register about address "0xC", so I believe that this is mistake of "0xC00".) 

And also, I would like you to confirm functional mode of EVM.
If your EVM setting is different from "RGMII to 1000Base-X", could you please confirm result after changing strap pin to "001" ?


Best Regards,

Hello,

Thank you for your reply.
So, did you confirm that address 0x1df show 0x41, right ? 
(I wonder why 0xC00 shows 0x140 on your previous thread. Because default value both address 0x0000 and 0xC00 is same value 0x1140.)
I think that customers phenomenon may happen only when this device is set as "1000Base-X" fiber mode.
So, I asked this.

Best Regards,

Hello,

I will need to check this in lab. Please expect a response by next Wednesday at latest.

Sincerely,

Gerome

Hello,

Thank you for your confirmation.
-1-
>While strapped into this mode, 0xC00 read out 0x1140.
How about result of following procedure which you posted during above condition ?

I just tested on DP83869 EVM with USB2MDIO. I first read 0x0 and 0xC and they read out 0x1140 and 0x140, respectively. I then change register 0x0 to have 0x900, read back to confirm, and then read 0xC. That value does not change.

-2-
>Upon further review, it has been determined that [6] is not relevant to device function for this mode.
According to datasheet of rev B, TI described user need to write 0x41 to Address 0x1DF in section 9.4.8.2 RGMII-to-1000Base-X Mode.
However, do you mean that user do not need to write "1" to bit[6] of address 0x1DF ?

Best Regards,

Hello,

>The above state described in -1- was when PHY was in RGMII to Copper mode, Op Code 0. These registers are independent of each other and please treat them as such.

What I want you to ask is when you set Op code 1 (RGMII to 1000Base-X), you can observe same result as case of Op code 0 or not.
could you give me reply for above ?

BR,

Hello,

When in Op Code 1, Reg 0xC00 = 0x1140 by default. However, when changing Reg 0x0 to 0x900 as before, it is observed that Reg 0xC00 reads back 0x900 as well.

Sincerely,

Gerome

Hello,

Thank you for your confirmation.
I understood that you got same result which I posted (Customer obeserved).

Then, I have following question.

Q. When user use RGMII to 1000Base-X mode, how user treat standard register ?
Do you recommend only to control extention register ?

According to datasheet 9.4.8.2, it seems that TI recommend to control extention register.
However, from above, since extention register is changed just controling standard register, user just control standard register in case of RGMII to 1000Base-X mode ?

Best Regards,