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DP83822I: VDDIO/AVD voltage detect timing and threshold

Part Number: DP83822I

I found that if I give 2V at VDDIO and AVD and then adjust the power supply to 3.3V,

the 0x0421 Analog Power Detect Status register will give me an incorrect status (1.8V).

Therefore, I would like to know the voltage threshold for detecting 1.8V/2.5V/3.3V and the voltage detection timing.

This will help me avoid potential risks in customer applications.

thx alot.

  • Hi,

    The power up timing requirements are listed in section 7.6 of the datasheet. The AVD and VDDIO ramp times must be under 100ms to avoid false detection of voltage level. The ramp should be continuous and the final voltage should fall within the recommended operating conditions. As long as these specifications are met, there will be no issue. We do have exact voltage threshold data that you are looking for.

    Thanks,

    David