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DS250DF230: about CTLE, VGA, DFE

Yuta Nishie
Genius 4955 points
Part Number: DS250DF230

Hi,

I have a question about the DS250DF230ZLSR.

1. Do you have a graph or table showing the frequency characteristics of CTLE, VGA and DFE?
    If you have one, please provide it.

2. If there is no table or graph for No. 1, could you tell me the range of effective CTLE Boost at Data Rate = 9.8304, 4.9, 2.4 and 1.2 bps?
    For example, ”at 9.8304 bps, CTLE Boost can be set from how many dB to how many dB”.

Here's some background on asking the above question.
We are communicating at Data Rate = 9.8304 bps, and we have changed the setting of the EQ TABLE INDEX in the CTLE Boost Table from the default 0 (0.6 dB) to 18 (25.8 dB).
However, there was no change in the operation of the device, so we asked a question.

In addition, the other setting conditions are as follows:

・ADAPT MODE(REG_0x31[6:5])=0
    Manual CTLE

・EQ TABLE INDEX:0～3
　1) Channel-REG_0x2D <- 0x3C
　2)   Channel-REG_0x03 <- 0x00 EQ TABLE INDEX:0
　 OR Channel-REG_0x03 <- 0x01 EQ TABLE INDEX:1
　 OR Channel-REG_0x03 <- 0x02 EQ TABLE INDEX:2
　 OR Channel-REG_0x03 <- 0x03 EQ TABLE INDEX:3

・EQ TABLE INDEX:4～
　1) Channel-REG_0x2D <- 0x38
　2)   Channel-REG_0x03 <- 0x00 EQ TABLE INDEX:4
　 OR Channel-REG_0x03 <- 0x40 EQ TABLE INDEX:5
　 OR Channel-REG_0x03 <- 0x50 EQ TABLE INDEX:6
　 ・・・
　 OR Channel-REG_0x03 <- 0xEF EQ TABLE INDEX:18

Best Regards,

Nishie

  • 0
    TI__Mastermind 36153 points

    Hi Nishie-san,

    1) We have a table describing the boost at 13 GHz in our programming guide, which you can find on mysecure.  Since you are interested in lower data rates, I will also send you some additional resources via E2E direct message.

    2) Your configuration procedure looks correct.  One thing you could double check is to verify that you are correctly selecting the channel registers.

    Typically, we would observe that significantly under- or over- equalizing the signal would result in eye closure.  Do you observe reduced HEO/VEO measurements when you set the CTLE at the limits?

    Another question, can you confirm that you have CDR lock?  Is there a particular reason why you are trying manual CTLE for 9.8304 Gbps?  Are you observing bit errors using the automatic adaptation?

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Genius 4955 points

    Hi Drew-san,

    1)Thank you for sharing the material by private message.
    Do you have any material about GVA and DFE?
    Also at TI HP, I applied to get a programming guide, but it hasn't arrived yet.
    Would it be possible for you to send me a programming guide as well?

    2)Let me confirm your questions.
    After I confirm, I will answer.

    Best Regards,

    Nishie

  • +1 in reply to Yuta Nishie
    TI__Mastermind 36153 points

    Hi Nishie-san,

    I see you have access to the DS250DF230 mysecure folder, which contains the programming guide.  Are you able to access this?

    https://www.ti.com/securesoftware/docs/securesoftware

    Regarding VGA, this should be considered a broadband gain that would apply to all frequencies equally (within the device bandwidth).  I don't have a graph for this, but the primary use case is to adjust for signal amplitude, while CTLE focuses on compensating for insertion loss.

    I also don't have any graphs for DFE.  In general, it is pretty challenging to manually set DFE taps.  If you're finding manual CTLE works best, you might still try allowing DFE to adapt in order to see what the retimer settles on.

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Genius 4955 points

    Hi Drew-san,

    Thank you for giving me the URL.
    I was able to access it and get the materials.

    I also understood about VGA and DFE.

    Drew Miller1 said:

    2) Your configuration procedure looks correct.  One thing you could double check is to verify that you are correctly selecting the channel registers.

    Typically, we would observe that significantly under- or over- equalizing the signal would result in eye closure.  Do you observe reduced HEO/VEO measurements when you set the CTLE at the limits?

    Another question, can you confirm that you have CDR lock?  Is there a particular reason why you are trying manual CTLE for 9.8304 Gbps?  Are you observing bit errors using the automatic adaptation?

    ->Our customers are checking on these.
    As soon as we find out, we will discuss it with you.

    Best Regards,

    Nishie

  • 0 in reply to Yuta Nishie
    Genius 4955 points

    Hi Drew-san,

    I report the results of my customer's confirmation.

    1. One thing you could double check is to verify that you are correctly selecting the channel registers.

    ->the channel registers selection is correct.

    2.  Do you observe reduced HEO/VEO measurements when you set the CTLE at the limits?

    ->VEO did not change, but VEO increased by about 100 mV.

    3. can you confirm that you have CDR lock? 

    ->Customer have CDR lock.

    4.  Are you observing bit errors using the automatic adaptation?

    ->After checking, it is error-free.

    Would it be possible to get some advice from these results?

    Best Regards,

    Nishie

  • 0 in reply to Yuta Nishie
    TI__Mastermind 36153 points

    Hi Nishie-san,

    Apologies if I missed this, but can you clarify what issue the customer is observing?  Looking over their responses, it seems like they have error free operation.  It seems like this is a good indicator that the retimer is working well in their system.

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Genius 4955 points

    Hi Drew-san,

    Communicating at ADAPT NODE = 0 and Data Rate = 9.8304 bps, Customer changed the EQ TABLE INDEX setting in the CTLE Boost Table from the default 0 (0.6 dB) to 18 (25.8 dB).
    However, there was no change in the operation of the device, so I asked because I wanted to know the cause.

    Best Regards,

    Nishie

  • 0 in reply to Yuta Nishie
    TI__Mastermind 36153 points

    Hi Nishie-san,

    Thank you for clarifying.  About how much insertion loss is there between the source TX and the retimer RX?  Also what is the source TX amplitude?

    Thanks,

    Drew

  • 0 in reply to Drew Miller1
    Genius 4955 points

    Hi Drew-san,

    Drew Miller1 said:
    About how much insertion loss is there between the source TX and the retimer RX? 

    ->About 0.5dB.

    Drew Miller1 said:
    Also what is the source TX amplitude?

    ->350mVpp~850mVpp.

    Best Regards,

    Nishie

  • 0 in reply to Yuta Nishie
    TI__Mastermind 36153 points

    Hi Nishie-san,

    I have a hypothesis to explain this. Due to low insertion loss, the high frequency content of the input signal already has a relatively high amplitude.  While applying additional CTLE should increase the amplitude, CTLE stages are typically only linear within a certain amplitude range.  I believe that the high frequency parts of the signal that would typically be boosted at high CTLE indexes are unable to be boosted past a certain amplitude due to amplitude limitations of the CTLE stage.  This is why we don't see much change in the eye between low and high CTLE indexes.

    If the customer is operating error free, I don't think this is an issue.  I would recommend using whichever CTLE value the device adapts to, assuming this provides suitable performance.

    Thanks,

    Drew