Hi Team,
Customer is using SN75DP130 in their design, but facing some no signal issues with high probabilistic, and they found it may related to DP-HPD timing. When we power supply DP130 firstly and then pull-high DP-HPD from low, this issue can be avoided.
So the questions are:
1. Do we have the timing requirements for DP-HPD and DP130 power supply during startup?
2. How do we deal with DP-HPD signal from SoC to Source, pass-through or with some processing?
Customer's application block diagram is as below for the reference:
Thanks.
