Hi team,
For 933 power up sequence, does the VDDIO & VDD18 rise time must be larger than 1ms? It seems too long.
935 and 953 doesn't need such long time.
BR
Jiawei
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi team,
For 933 power up sequence, does the VDDIO & VDD18 rise time must be larger than 1ms? It seems too long.
935 and 953 doesn't need such long time.
BR
Jiawei
Jiawei,
Is your question about 933 or 934? The screenshot of the power sequence is from the 934 datasheet
Best Regards,
Casey
Hi Casey,
Sorry for the misunderstanding, it's the question about 934. Thanks!
BR
Jiawei
Jiawei,
The spec is that the rise time of the rails should be greater than 1ms. This is to prevent the ESD cell in the pins from triggering
Best Regards,
Casey
Casey,
Thanks for your reply, could you kindly tell me how to achieve 1ms? Typically VDDIO and VDD18 are got from LDO, it's hard to achieve.
BR
Jiawei
Hello Jiawei,
Here is an application note for how to design an external soft start circuit: /cfs-file/__key/communityserver-discussions-components-files/138/1616.Soft_2D00_Start-Circuits-for-LDO-Linear-Regulators_5F00_slyt096_5B00_1_5D00_.pdf
Also within TI we have LDOs with integrated soft start for example: TPS74701-Q1
Best Regards,
Casey