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DP83826E: App note: How and Why to Use the DP83826E for EtherCAT®︎ Applications

Part Number: DP83826E

I am trying to run EtherCAT with a Sitara processor DP83826E.After following the TI app note "How and Why to Use the DP83826E for EtherCAT® Applications" ,page-7 . I am using the following code to write to the PHY Registers. However. my register dump, immediately after the write functions, differs from the App note. What is the reason behind that?

void dp83826WritePhyReg(uint32_t mdioBaseAddress, uint32_t phyNum)
{
CSL_MDIO_phyRegWrite(mdioBaseAddress, phyNum, 0x00, 0x3300);
CSL_MDIO_phyRegWrite(mdioBaseAddress, phyNum, 0x04, 0x01E1);
CSL_MDIO_phyRegWrite(mdioBaseAddress, phyNum, 0x09, 0x0020);
CSL_MDIO_phyRegWrite(mdioBaseAddress, phyNum, 0x0A, 0x0001);
CSL_MDIO_phyRegWrite(mdioBaseAddress, phyNum, 0x0B, 0x0008);
CSL_MDIO_phyRegWrite(mdioBaseAddress, phyNum, 0x18, 0x0080);
CSL_MDIO_phyRegWrite(mdioBaseAddress, phyNum, 0x19, 0x8020);

}

  • Hello Jagbir,

    I see the following differences.

    1. 0x0003: The read value you are observing is correct (this value indicates that you are using latest revision of silicon which is expected. However, I see that you strapped the device in basic mode. For EtherCAT applications, you need to use the PHY in enhanced mode.
    2. 0x000D,E: You can ignore the values in the appnote. The values will differ from setup to setup

    I will have to check the other values with our team and get back to you.

    --
    Regards,
    Gokul.

  • Hi Gokul,

    I switched to Enhanced mode by pulling up the Mode pin. EtheCAT did not work but here are my register contents.

    [CortxA8] Register dump before MDI configuration 
    Register 0x0000 : 0x2000 
    Register 0x0001 : 0x7849 
    Register 0x0002 : 0x2000 
    Register 0x0003 : 0xa111 
    Register 0x0004 : 0x0081 
    Register 0x0005 : 0x0000 
    Register 0x0006 : 0x0004 
    Register 0x0007 : 0x2001 
    Register 0x0008 : 0x0000 
    Register 0x0009 : 0x0020 
    Register 0x000a : 0x0102 
    Register 0x000b : 0x0009 
    Register 0x000c : 0x0000 
    Register 0x000d : 0x0000 
    Register 0x000e : 0x0000 
    Register 0x000f : 0x0000 
    Register 0x0010 : 0x4000 
    Register 0x0011 : 0x010b 
    Register 0x0012 : 0x0000 
    Register 0x0013 : 0x0800 
    Register 0x0014 : 0x0000 
    Register 0x0015 : 0x0000 
    Register 0x0016 : 0x0100 
    Register 0x0017 : 0x0061 
    Register 0x0018 : 0x0400 
    Register 0x0019 : 0x8001 
    Register 0x001a : 0x0000 
    Register 0x001b : 0x007d 
    Register 0x001c : 0x05ee 
    Register 0x001d : 0x0000 
    Register 0x001e : 0x0102 
    Register 0x001f : 0x0000 
    Ext. Register 0x25: 0x0041 
    Ext. Register 0x304: 0x0008 
    Ext. Register 0x460: 0x0565 
    Ext. Register 0x469: 0x0000 
    Ext. Register 0x467: 0x0093 
    Ext. Register 0x468: 0x0194

     

    Register dump after MDI configuration 
    Register 0x0000 : 0x3100 
    Register 0x0001 : 0x7849 
    Register 0x0002 : 0x2000 
    Register 0x0003 : 0xa111 
    Register 0x0004 : 0x01e1 
    Register 0x0005 : 0x0000 
    Register 0x0006 : 0x0004 
    Register 0x0007 : 0x2001 
    Register 0x0008 : 0x0000 
    Register 0x0009 : 0x0020 
    Register 0x000a : 0x0001 
    Register 0x000b : 0x0008 
    Register 0x000c : 0x0000 
    Register 0x000d : 0x401f 
    Register 0x000e : 0x0008 
    Register 0x000f : 0x0000 
    Register 0x0010 : 0x0002 
    Register 0x0011 : 0x010b 
    Register 0x0012 : 0x0000 
    Register 0x0013 : 0x0800 
    Register 0x0014 : 0x0000 
    Register 0x0015 : 0x0000 
    Register 0x0016 : 0x0100 
    Register 0x0017 : 0x0000 
    Register 0x0018 : 0x0080 
    Register 0x0019 : 0x8021 
    Register 0x001a : 0x0000 
    Register 0x001b : 0x007d 
    Register 0x001c : 0x05ee 
    Register 0x001d : 0x0000 
    Register 0x001e : 0x0102 
    Register 0x001f : 0x0000 
    Ext. Register 0x25: 0x0041 
    Ext. Register 0x304: 0x0008 
    Ext. Register 0x460: 0x0005 
    Ext. Register 0x469: 0x0004 
    Ext. Register 0x467: 0x0093 
    Ext. Register 0x468: 0x0194 

  • Hello Jagbir,

    I can take a look at the register reads.

    But, I see that the device is not linked up. If the device is linked-up, 0x0001 should read 0x786D.

    In the other thread, you mentioned that center tap is connected to 3.3V. This might be the reason why the device is not linked up.

    --
    Regards,
    Gokul.

  • I was able to connect successfully after fixing the center tap dc bias. I have two DP83826 in my system, and I am connected on the first phy(PHY0) at address 0x5 and the second phy (PHY1) at address 0x3. I am getting a port crossing warning after connecting to the slave. I am getting the same warning even after I remove PH1. Below is the latest register dump and the port crossing warning.

    [CortxA8] Register dump before MDI configuration
    Register 0x0000 : 0x3100
    Register 0x0001 : 0x7849
    Register 0x0002 : 0x2000
    Register 0x0003 : 0xa131
    Register 0x0004 : 0x01e1
    Register 0x0005 : 0x0000
    Register 0x0006 : 0x0004
    Register 0x0007 : 0x2001
    Register 0x0008 : 0x0000
    Register 0x0009 : 0x0000
    Register 0x000a : 0x0100
    Register 0x000b : 0x0000
    Register 0x000c : 0x0000
    Register 0x000d : 0x0000
    Register 0x000e : 0x0000
    Register 0x000f : 0x0000
    Register 0x0010 : 0x0002
    Register 0x0011 : 0x0108
    Register 0x0012 : 0x0000
    Register 0x0013 : 0x0800
    Register 0x0014 : 0x0000
    Register 0x0015 : 0x0000
    Register 0x0016 : 0x0100
    Register 0x0017 : 0x0041
    Register 0x0018 : 0x0400
    Register 0x0019 : 0xc005
    Register 0x001a : 0x0000
    Register 0x001b : 0x007d
    Register 0x001c : 0x05ee
    Register 0x001d : 0x0000
    Register 0x001e : 0x0102
    Register 0x001f : 0x0000
    Ext. Register 0x25: 0x0041
    Ext. Register 0x304: 0x000e
    Ext. Register 0x460: 0x0565
    Ext. Register 0x469: 0x0404
    Ext. Register 0x467: 0x0014
    Ext. Register 0x468: 0x28a7

    Register dump after MDI configuration
    Register 0x0000 : 0x3100
    Register 0x0001 : 0x7849
    Register 0x0002 : 0x2000
    Register 0x0003 : 0xa131
    Register 0x0004 : 0x01e1
    Register 0x0005 : 0x0000
    Register 0x0006 : 0x0004
    Register 0x0007 : 0x2001
    Register 0x0008 : 0x0000
    Register 0x0009 : 0x0020
    Register 0x000a : 0x0001
    Register 0x000b : 0x0008
    Register 0x000c : 0x0000
    Register 0x000d : 0x401f
    Register 0x000e : 0x0008
    Register 0x000f : 0x0000
    Register 0x0010 : 0x0002
    Register 0x0011 : 0x0108
    Register 0x0012 : 0x0000
    Register 0x0013 : 0x0800
    Register 0x0014 : 0x0000
    Register 0x0015 : 0x0000
    Register 0x0016 : 0x0100
    Register 0x0017 : 0x0000
    Register 0x0018 : 0x0080
    Register 0x0019 : 0x8025
    Register 0x001a : 0x0000
    Register 0x001b : 0x007d
    Register 0x001c : 0x05ee
    Register 0x001d : 0x0000
    Register 0x001e : 0x0102
    Register 0x001f : 0x0000
    Ext. Register 0x25: 0x0041
    Ext. Register 0x304: 0x0008
    Ext. Register 0x460: 0x0005
    Ext. Register 0x469: 0x0004
    Ext. Register 0x467: 0x0014
    Ext. Register 0x468: 0x28a7

    The scope capture of the PHY pin 32 (Reset, green) and pin 30(LED0, Grey). The BootConfigFetDisable(FET1,Purple ) and BootConfigFetEnable(FET2,red) these FET work the same way as in ICE110 Eval board.

  • I am getting a port crossing warning after connecting to the slave

    Hi Jagbir,

    Can you please let me know what path crossing warning means?

    From the logs, looks like the link is still not established. Can you please disconnect link partner PHY, terminate the transmit lines (TD_P, TD_M) and capture the waveforms on the oscilloscope?

    --
    Regards,
    Gokul.

  • The link is established for sure; I can see the EtherCAT slave on EC-Engineer software.

    The Wireshark can also recognize EtherCAT communication when I scan for slaves on the ports. 

  • Hi Jagbir,

    Register 0x0001 reads 0x7849, whereas it should read 0x786D. Can you please register 0x1 twice and confirm that the register now reads 0x786D?

    --
    Regards,
    Gokul.

  • The reason why Register 0x0001 does not read 0x7849 is that I run the EtherCAT stack on bare metal code, and the registers have to be printed before ECAT communication is established using ER-Engineer.

  • Hi Jagbir,

    Thanks for the update.

    I am not aware of what path crossing warning means. Can you please let me know what this means? I can try to see what went wrong.

    --
    Regards,
    Gokul.

  • Port crossing warning means:  Input(PHY0) and output port(PHY1) are changed. Interestingly, I am getting the same warning with the AMICICE110 EVM. Below is the warning explanation in the EC Engineer tool.

  • Hi Jagbir,

    From a single PHY perspective, what does it mean that PHY 0 and PHY1 are interchanged?

    I have expertise only at a PHY level and haven't worked with any EtherCAT tools.

    --
    Regards,
    Gokul.

  • Please refer to the ESC hardware datasheet. Specifically section 3

    download.beckhoff.com/.../ethercat_esc_datasheet_sec1_technology_2i3.pdf

  • Hello Jagbir,

    I still couldn't get how PHY0 and PHY1 being interchanged can be a PHY issue. Can you please point me to the part of the PHY which can cause this warning?

    --
    Regards,
    Gokul.

  • Hi Gokul,

    I have a separate question: I do have 4.7pF filtering caps on TDx and RDx lines. Is it violating any DP83826 design spec as I don't any such capacitor in the reference design of DP83826. 

  • Hello Jagbir,

    I don't recommend using these filtering caps on TDx and RDx lines. I also suggest changing the center tap capacitances as per the section 10.2.1 of the datasheet.

    --
    Regards,
    Gokul.