DS320PR822: Is RX_DET_CTRL register settable via EEPROM self-load ?

Hi Vicente,

That is an extremely disappointing oversight by the engineering team. It means that for standalone applications (i.e. where no I2C master is available)  if one wants to disable RX_DET for non-PCIe links, PIN_MODE is required and one must give up on having any flexibility with the EQ and GAIN settings. Discouragingly short sighted decision not to include RX_DET_CTRL initialization from EEPROM. Literally would have been just one more byte for channel settings.

Unless you discover information contradicting the above, I'll consider this case closed.

-Mark

Hi Vincente,

I'd love to believe that, but I am a bit wary and confused if that is true.

In the use case you describe, the RX_DET/SCL would seem to have two conflicting requirements. First requirement is 1K L0 pull down on the pin for checking RX_DET immediately on power up. Second requirement is 4.7K pull up (see section 7.5.2) on the pin for SCL to function during MODE=SMBus/I2C. For things to work as you describe, the 1K PD would need to be present right after power on and then removed and replaced with a 4.7K pull up to facilitate I2C self-load from EEPROM. I wouldn't imagine that that's what they are suggesting.

What am I missing? Any help is appreciated.

Regards,

-Mark

Hi Mark, 
I've reached out to design and will get back to you once I hear back. 

Regards, 

Vicente

Hi Vicente,

Thank you for reaching out to your design team.

We are in the process of finalizing schematics and the redriver schematics are the last item holding us up.

We appreciate your team's efforts in providing a timely solution.

Regards,

-Mark

Hi Mark, 
I am still waiting to hear back. 
Once I have response I will update you immediately. 

Regards, 

Vicente 

Hi Vicente,

I think I have a workaround, but want to run it by you and your design team. My approach is as follows:

   1. At power-up, have RX_DET/SCL pin sample either L0=1K PD or L4=float, where a DIP switch determines whether the PD or float is present.

   2. Then, 15ms after power-up switch RX_DET/SCL pin to a 4.7K PU to prepare I2C bus and also drive READ_EN_N low to initiate EEPROM self load.

I have a candidate circuit that accomplishes the change-over on the RX_DET/SCL pin by using an analog switch controlled appropriately, but I need confirmation that this approach will actually allow me to correctly set RX detect state, while subsequently allowing the EEPROM self load to occur after that. Note that from the moment of power-on, I plan to hold the READ_EN_N pin high, until the RX_DET/SCL change-over happens. I do not want the DS320 to prematurely start the EEPROM self load, but only to do so when commanded at the change-over. If need be, I can drive READ_EN_N pin from my 3.3V_AUX voltage supply which is on even before the DS320 3.3V would be powered on. (page 8 of datasheet, states that I_IH,FS = 200us for fail-safe pins, of which READ_EN_N is one, so I believe that voltage can be applied to that pin prior to device power-on without problem, thus insuring that is is always high until change-over).

Please let me know, as I need to finish up my design. Thanks much.

Regards,

-Mark

Hi Vicente,

Sorry to belabor the point, but when you say "we use pin mode or I2C" are you meaning that TI really only supports "SMBus/I2C Secondary Mode"? And that "SMBus/I2C Primary Mode" is not supported? If so, that's a pretty significant shift from what the datasheet says, because it explicitly talks about both I2C modes being supported.

If you mean to say that I2C primary mode *is* supported, then I still maintain that TI needs to explain what is happening with the RX_DET/SCL pin. Namely, when MODE = L1 (SMBus/I2C Primary Mode), how does the DS320 determine the state of RX_DET at power-up if there is a 4.7K PU on the RX_DET/SCL pin as recommended by the datasheet (p.5)? Will RX_DET state be on or off, and how is that determined? 

I wonder if the real answer is that TI never realized the conflict that existed for the dual-use functionality on the RX_DET/SCL pin. If that's the case, then I think it behooves TI to simply admit it. If that's not the case, then TI owes the customer a more detailed explanation of what is happening on the RX_DET/SCL pin when MODE = L1, so that one can design a feasible workaround. If TI doesn't want a public discussion of this topic, then I'm open to direct email.

Regards,

-Mark

Hi Mark, 
Both Primary and Secondary I2C modes are supported. 
Next week I will look at Rx_det pin on scope when device is in L1 mode. 

Regards, 

Vicente