Hi everyone!
I have a custom board and am trying to use a Zynq SoC as a USB device using an USB-C connector. We are using an HD3SS3220 configured as UFP, along with an USB3346 ULPI to keep USB2.0 functionality. The schematic is as below (USB3346 part omitted as it is not relevant for SuperSpeed).
The problem: The link state is reported as SuperSpeed being disabled, and there are no endpoint configurations and/or data transfers. All in all, I cannot get my PC to enumerate the device.
Considerations:
- I'm using an USB-C to USB-C cable that is usually used between my laptop and monitor, for display and 100W PD, so I think it is of sufficient quality for this application.
- The Zynq USB core initializes in SuperSpeed correctly,which tells me the Zynq is receiving the LVDS clock and that the core is (so far) correctly configured.
- The HD3SS3220 is configured as I2C, and I can read/write the registers. Reading register 0x09 correctly reports a cable as Unattached or Attached.SNK (UFP) when using USB-C to USB-c cable, and 'Attached to an Accessory' when using an USB-A to USB-C cable (cable quality unconfirmed).
After some more review, I understand that ID, VCONN_FAULT_N and INT_N pins should be pulled-up with 200kOhm resistors. I also understand that both VDD5 and VCC33 could be better decoupled. All this will be corrected in a future.
However, I have some doubts regarding the SuperSpeed part. I have searched the forums for similar problems, which gave me a better understanding of some parts, but I still have some questions:
1) If the HD3SS3220 is just a mux (regarding SuperSpeed lines), do I need AC caps between the Zynq and the mux? Wouldn't the TX caps between MUX and connector be enough to remove Vcm?
2) If I do need these additional capacitors, do I need to adjust the current values? Having two sets of 100nF caps on, e.g., the TX lines would mean that the total capacitance would fall below the required 75nF-265nF range? Wouldn't this be a problem if the other end of the cable has 330nF caps installed?
3) I have seen redrivers being used between the Zynq and the HD3SS3220. However, I fail to understand if I actually need one, or in which situations it would be required (I understand this is not an HD3SS3220 question, so it is fine if I cannot get an answer on this!)
Could someone please review the design and help as possible?
Thank you very much!
