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DP83848J: Not getting link when connected to a router. Most times with a 100 Mbps switch it properly works

Part Number: DP83848J

We develop an IoT gateway based on ESP32 + DP83848J as PHY for ehternet. The PHY is working properly getting the link when connected to a 100 Mbps switch. If we directly connect the Ethernet to a modem router (or some switches) it does not get the link. We produced 10 devices and not all of them show the same problem with the same network device (router/switches).

We made several tests and the strapping is OK, Voltages on PFB and RBIAS are OK. 

Can someone give us some guidance how to proceed?

Thanks a lot

  • Hi Matteo,

    Could you try connecting two DP83848 boards together and seeing what speed they link at, if any? Could you also provide registers 0x00-0x1E?

    We produced 10 devices and not all of them show the same problem with the same network device (router/switches).

    Are you saying that some devices work fine and that others only work at specific speeds?

    Best regards,

    Melissa

  • I tried to connected them to a Switch and the link at 100 MB. Unfortunately I don't have simple access to the registers since I'm using a ESP32 with AT Firmware supporting your PHY.

    Are you saying that some devices work fine and that others only work at specific speeds?

    What I say is that if I connect the devices to a 100 MB switch all of them works. If I connect them to a GB router/switch only few of them works. I shared schematics and layout via mail with the Customer Support. Did you get it?

    Best regards

    Matteo

  • Hi Matteo,

    It is possible that the issue has something to do with the advertisement and auto negotiation settings which are confirmed/configured through the registers. The registers can be accessed through the MDIO/MDC pins, do you have any way to connect to these pins? Debugging without register access will be difficult.

    If I connect them to a GB router/switch only few of them works.

    Are these switches that only advertise Gigabit speeds?

    I did not receive any schematic. I have sent a friend request, please accept so you can send the schematic over chat.

    Best regards,

    Melissa

  • Hi Matteo,

    I just wanted to follow up on the below questions:

    Are these switches that only advertise Gigabit speeds?
    The registers can be accessed through the MDIO/MDC pins, do you have any way to connect to these pins?

    I have received your schematic and will need a few days to review. 

    Best regards,

    Melissa

  • Are these switches that only advertise Gigabit speeds?

    Not only Gigabit, also 100 MBs

    The registers can be accessed through the MDIO/MDC pins, do you have any way to connect to these pins?

    Yes, i can connect to this pins, however since I'm using a ESP32 with ethernet AT commands firmware, I'm trying to retrieve this info's via the ESP 32.

    I'm looking forward for the schematic review. 

    Best regards

    Matteo

  • Hi Matteo,

    Yes, i can connect to this pins, however since I'm using a ESP32 with ethernet AT commands firmware, I'm trying to retrieve this info's via the ESP 32.

    Please let me know if you are able to figure out this part aswell.

    Best regards,

    Melissa

  • Hi Matteo,

    Any update on the registers?

    I took a look at your MDI trace, XI pin, and AN0/AN1 pins and have a few comments:

    - We recommend putting a transformer on the MDI line as shown in the section 7.2.1.1 TPI Network Circuit of the datasheet

    - Please make sure the oscillator meets our requirements (a 50-MHz 0.005% (±50 ppm) CMOS-level oscillator source ) RMII mode

    - If you want to use the LED pins as LEDs, we suggest this configuration from section 6.3.3.1 LED:

    Best regards,

    Melissa

  • Hi Melissa, we finally read the register in differet situations. Here a brief report

    ETH connected to 1Gbps Router [Not Working]:

    E (123197) [dp83848_update_link_duplex_speed] ETH_PHY_BMCR_REG_ADDR val[0x1000]

    E (123205) [dp83848_update_link_duplex_speed] ETH_PHY_BMSR_REG_ADDR val[0x7849]

    E (123214) [dp83848_update_link_duplex_speed] ETH_PHY_ANAR_REG_ADDR val[0x1e1]

    E (123224) [dp83848_update_link_duplex_speed] ETH_PHY_ANLPAR_REG_ADDR val[0x0]

    E (123233) [dp83848_update_link_duplex_speed] ETH_PHY_ANER_REG_ADDR val[0x4]

    E (123243) [dp83848_update_link_duplex_speed] register 0x10 - val[0x0] alternate to val[0x4000]

    E (123250) [dp83848_update_link_duplex_speed] register 0x19 - val[0x8021]

     

     

     

    EHT not connected:

    E (123197) [dp83848_update_link_duplex_speed] ETH_PHY_BMCR_REG_ADDR val[0x1000]

    E (123205) [dp83848_update_link_duplex_speed] ETH_PHY_BMSR_REG_ADDR val[0x7849]

    E (123214) [dp83848_update_link_duplex_speed] ETH_PHY_ANAR_REG_ADDR val[0x1e1]

    E (123224) [dp83848_update_link_duplex_speed] ETH_PHY_ANLPAR_REG_ADDR val[0x0]

    E (123233) [dp83848_update_link_duplex_speed] ETH_PHY_ANER_REG_ADDR val[0x4]

    E (123243) [dp83848_update_link_duplex_speed] register 0x10 - val[0x0] alternate to val[0x4000]

    E (123250) [dp83848_update_link_duplex_speed] register 0x19 - val[0x8021]

     

     

    ETH connected to 100 Mbps switch:

    E (123197) [dp83848_update_link_duplex_speed] ETH_PHY_BMCR_REG_ADDR val[0x1000]

    E (123205) [dp83848_update_link_duplex_speed] ETH_PHY_BMSR_REG_ADDR val[0x786D]

    E (123214) [dp83848_update_link_duplex_speed] ETH_PHY_ANAR_REG_ADDR val[0x1e1]

    E (123224) [dp83848_update_link_duplex_speed] ETH_PHY_ANLPAR_REG_ADDR val[0x4DE1]

    E (123233) [dp83848_update_link_duplex_speed] ETH_PHY_ANER_REG_ADDR val[0x5]

    E (123243) [dp83848_update_link_duplex_speed] register 0x10 - val[0x611]

    E (123250) [dp83848_update_link_duplex_speed] register 0x19 - val[0x8021]

     

     ________________We got the same results also with BMCR register as default:

    E (123197) [dp83848_update_link_duplex_speed] ETH_PHY_BMCR_REG_ADDR val[0x3100]

    Can u help us?

    Best regards

  • Hi Matteo,

    Thank you for providing this. In the 1 Gbps router case, the register  ETH_PHY_ANLPAR_REG_ADDR shows that the link partner is not advertising 100/10 Mbps speeds. 

    Are these switches that only advertise Gigabit speeds?

    Not only Gigabit, also 100 MBs

    Are you certain that this router can advertise both gigabit and 100 Mbps speeds? The DP83848 can only support up to 100 Mbps.

    Please check your link partner configuration to make sure that it also has autonegotiation enabled and the lower speeds enabled. 

    Best regards,

    Melissa

  • Hi, YES the Router also advertise 100 MBs. DO we have any other register to check?

    Best regards

    Matteo

  • Hi Matteo,

    Given that ETH_PHY_ANLPAR_REG = 0x0 and that the PHY is able to connect with other 100 Mbps switches, it is likely it is a link partner configuration issue. 

    It is possible that in the default settings, the 1Gig switch is not configured automatically to have other speeds enabled, so you will have to look into how to do this.

    Some other tests to confirm this would be to:

    1. Connect a known good 100 Mbps link partner to the 1Gig switch. If it does not connect, it would likely be the link partner configuration.

    2. Connect two of your Ethernet PHY boards together to see if they link. If they do connect, it could further point to the fact that it is a link partner configuration issue.

    Best regards,

    Melissa

  • Some other tests to confirm this would be to:

    1. Connect a known good 100 Mbps link partner to the 1Gig switch. If it does not connect, it would likely be the link partner configuration.

    I tested several known 100 Mbps link partern to the 1Gig switch and they work properly

    2. Connect two of your Ethernet PHY boards together to see if they link. If they do connect, it could further point to the fact that it is a link partner configuration issue.

    In this case I don't get any connection, and the registers looks like in the case of ETH connected to 1Gbps Router

    ETH connected to 1Gbps Router [Not Working]:

    E (123197) [dp83848_update_link_duplex_speed] ETH_PHY_BMCR_REG_ADDR val[0x1000]

    E (123205) [dp83848_update_link_duplex_speed] ETH_PHY_BMSR_REG_ADDR val[0x7849]

    E (123214) [dp83848_update_link_duplex_speed] ETH_PHY_ANAR_REG_ADDR val[0x1e1]

    E (123224) [dp83848_update_link_duplex_speed] ETH_PHY_ANLPAR_REG_ADDR val[0x0]

    E (123233) [dp83848_update_link_duplex_speed] ETH_PHY_ANER_REG_ADDR val[0x4]

    E (123243) [dp83848_update_link_duplex_speed] register 0x10 - val[0x0] alternate to val[0x4000]

    E (123250) [dp83848_update_link_duplex_speed] register 0x19 - val[0x8021]

     

    How can we proceed?

    Thanks a lot for your support

  • Hi Matteo,

    Just to clarify, in the scenario where you connect both PHYs together, are both PHYs they showing the same register dumps? If not, could you provide both dumps and registers 0x00-0x1E?

    What cables are you using?

    Best regards,

    Melissa

  • Dear Meliisa, 

    here the results:

    NO ETH CONNECTED:
    E (1664227) dp83848: @enprevo REG[0x0] val[0x3000]

    E (1664228) dp83848: @enprevo REG[0x1] val[0x7849]

    E (1664228) dp83848: @enprevo REG[0x2] val[0x2000]

    E (1664233) dp83848: @enprevo REG[0x3] val[0x5c90]

    E (1664238) dp83848: @enprevo REG[0x4] val[0xa1]

    E (1664244) dp83848: @enprevo REG[0x5] val[0x0]

    E (1664249) dp83848: @enprevo REG[0x6] val[0x4]

    E (1664254) dp83848: @enprevo REG[0x7] val[0x2001]               

    E (1664259) dp83848: @enprevo REG[0x8] val[0x0]                  

    E (1664265) dp83848: @enprevo REG[0x9] val[0x0]                  

    E (1664270) dp83848: @enprevo REG[0xa] val[0x0]                  

    E (1664275) dp83848: @enprevo REG[0xb] val[0x0]

    E (1664280) dp83848: @enprevo REG[0xc] val[0x0]

    E (1664285) dp83848: @enprevo REG[0xd] val[0x0]

    E (1664291) dp83848: @enprevo REG[0xe] val[0x0]

    E (1664296) dp83848: @enprevo REG[0xf] val[0x0]

    E (1664301) dp83848: @enprevo REG[0x10] val[0x0]

    E (1664306) dp83848: @enprevo REG[0x11] val[0x0]

    E (1664311) dp83848: @enprevo REG[0x12] val[0x0]

    E (1664317) dp83848: @enprevo REG[0x13] val[0x0]

    E (1664322) dp83848: @enprevo REG[0x14] val[0x0]

    E (1664327) dp83848: @enprevo REG[0x15] val[0x0]

    E (1664332) dp83848: @enprevo REG[0x16] val[0x100]

    E (1664338) dp83848: @enprevo REG[0x17] val[0x21]

    E (1664343) dp83848: @enprevo REG[0x18] val[0x0]

    E (1664348) dp83848: @enprevo REG[0x19] val[0x8021]

    E (1664354) dp83848: @enprevo REG[0x1a] val[0x904]

    E (1664359) dp83848: @enprevo REG[0x1b] val[0x0]

    E (1664365) dp83848: @enprevo REG[0x1c] val[0x0]

    E (1664370) dp83848: @enprevo REG[0x1d] val[0x6011]

    E (1664375) dp83848: @enprevo REG[0x1e] val[0x3f]

     

    WITH 100 MBPS  SWITCH CONNECTED:
    E (1716227) dp83848: @enprevo REG[0x0] val[0x3000]

    E (1716228) dp83848: @enprevo REG[0x1] val[0x786d]

    E (1716229) dp83848: @enprevo REG[0x2] val[0x2000]

    E (1716233) dp83848: @enprevo REG[0x3] val[0x5c90]

    E (1716239) dp83848: @enprevo REG[0x4] val[0xa1]

    E (1716244) dp83848: @enprevo REG[0x5] val[0x4de1]

    E (1716249) dp83848: @enprevo REG[0x6] val[0x5]

    E (1716255) dp83848: @enprevo REG[0x7] val[0x2801]

    E (1716260) dp83848: @enprevo REG[0x8] val[0x0]

    E (1716267) dp83848: @enprevo REG[0x9] val[0x0]

    E (1716270) dp83848: @enprevo REG[0xa] val[0x0]

    E (1716276) dp83848: @enprevo REG[0xb] val[0x0]

    E (1716281) dp83848: @enprevo REG[0xc] val[0x0]

    E (1716286) dp83848: @enprevo REG[0xd] val[0x0]

    E (1716291) dp83848: @enprevo REG[0xe] val[0x0]

    E (1716296) dp83848: @enprevo REG[0xf] val[0x0]

    E (1716301) dp83848: @enprevo REG[0x10] val[0x4611]

    E (1716307) dp83848: @enprevo REG[0x11] val[0x0]

    E (1716312) dp83848: @enprevo REG[0x12] val[0x0]

    E (1716318) dp83848: @enprevo REG[0x13] val[0x0]

    E (1716323) dp83848: @enprevo REG[0x14] val[0x0]

    E (1716328) dp83848: @enprevo REG[0x15] val[0x0]

    E (1716333) dp83848: @enprevo REG[0x16] val[0x100]

    E (1716339) dp83848: @enprevo REG[0x17] val[0x21]

    E (1716344) dp83848: @enprevo REG[0x18] val[0x0]

    E (1716349) dp83848: @enprevo REG[0x19] val[0x8021]

    E (1716355) dp83848: @enprevo REG[0x1a] val[0x904]

    E (1716360) dp83848: @enprevo REG[0x1b] val[0x0]

    E (1716366) dp83848: @enprevo REG[0x1c] val[0x0]

    E (1716371) dp83848: @enprevo REG[0x1d] val[0x6011]

    E (1716376) dp83848: @enprevo REG[0x1e] val[0x83e]

     

    WITH SAME ETH PHY CONNECTED:

     

    First board:
    E (100281) dp83848: @enprevo REG[0x0] val[0x3000]

    E (100281) dp83848: @enprevo REG[0x1] val[0x7849]

    E (100282) dp83848: @enprevo REG[0x2] val[0x2000]

    E (100286) dp83848: @enprevo REG[0x3] val[0x5c90]

    E (100292) dp83848: @enprevo REG[0x4] val[0xa1]

    E (100297) dp83848: @enprevo REG[0x5] val[0x0]

    E (100302) dp83848: @enprevo REG[0x6] val[0x5]

    E (100307) dp83848: @enprevo REG[0x7] val[0x2001]

    E (100312) dp83848: @enprevo REG[0x8] val[0x0]

    E (100317) dp83848: @enprevo REG[0x9] val[0x0]

    E (100323) dp83848: @enprevo REG[0xa] val[0x0]

    E (100328) dp83848: @enprevo REG[0xb] val[0x0]

    E (100333) dp83848: @enprevo REG[0xc] val[0x0]

    E (100338) dp83848: @enprevo REG[0xd] val[0x0]

    E (100343) dp83848: @enprevo REG[0xe] val[0x0]

    E (100348) dp83848: @enprevo REG[0xf] val[0x0]

    E (100353) dp83848: @enprevo REG[0x10] val[0x4000]/[0x0] cycle

    E (100358) dp83848: @enprevo REG[0x11] val[0x0]

    E (100364) dp83848: @enprevo REG[0x12] val[0x0]

    E (100369) dp83848: @enprevo REG[0x13] val[0x0]

    E (100374) dp83848: @enprevo REG[0x14] val[0x0]

    E (100379) dp83848: @enprevo REG[0x15] val[0x0]

    E (100384) dp83848: @enprevo REG[0x16] val[0x100]

    E (100390) dp83848: @enprevo REG[0x17] val[0x21]

    E (100395) dp83848: @enprevo REG[0x18] val[0x0]

    E (100400) dp83848: @enprevo REG[0x19] val[0x8021]

    E (100406) dp83848: @enprevo REG[0x1a] val[0x904]

    E (100411) dp83848: @enprevo REG[0x1b] val[0x0]

    E (100416) dp83848: @enprevo REG[0x1c] val[0x0]

    E (100421) dp83848: @enprevo REG[0x1d] val[0x6011]

    E (100427) dp83848: @enprevo REG[0x1e] val[0x3f]

     

    Second board:
    [1B][0;31mE (66224) dp83848: @enprevo REG[0x0] val[0x3000][1B][0m

    [1B][0;31mE (66225) dp83848: @enprevo REG[0x1] val[0x7849][1B][0m

    [1B][0;31mE (66225) dp83848: @enprevo REG[0x2] val[0x2000][1B][0m

    [1B][0;31mE (66229) dp83848: @enprevo REG[0x3] val[0x5c90][1B][0m

    [1B][0;31mE (66235) dp83848: @enprevo REG[0x4] val[0xa1][1B][0m

    [1B][0;31mE (66240) dp83848: @enprevo REG[0x5] val[0x0][1B][0m

    [1B][0;31mE (66245) dp83848: @enprevo REG[0x6] val[0x4][1B][0m

    [1B][0;31mE (66250) dp83848: @enprevo REG[0x7] val[0x2001][1B][0m

    [1B][0;31mE (66255) dp83848: @enprevo REG[0x8] val[0x0][1B][0m

    [1B][0;31mE (66260) dp83848: @enprevo REG[0x9] val[0x0][1B][0m

    [1B][0;31mE (66265) dp83848: @enprevo REG[0xa] val[0x0][1B][0m

    [1B][0;31mE (66270) dp83848: @enprevo REG[0xb] val[0x0][1B][0m

    [1B][0;31mE (66275) dp83848: @enprevo REG[0xc] val[0x0][1B][0m

    [1B][0;31mE (66280) dp83848: @enprevo REG[0xd] val[0x0][1B][0m

    [1B][0;31mE (66285) dp83848: @enprevo REG[0xe] val[0x0][1B][0m

    [1B][0;31mE (66290) dp83848: @enprevo REG[0xf] val[0x0][1B][0m

    [1B][0;31mE (66295) dp83848: @enprevo REG[0x10] val[0x4000][1B][0m ]/[0x0] cycle

    [1B][0;31mE (66300) dp83848: @enprevo REG[0x11] val[0x0][1B][0m

    [1B][0;31mE (66306) dp83848: @enprevo REG[0x12] val[0x0][1B][0m

    [1B][0;31mE (66311) dp83848: @enprevo REG[0x13] val[0x0][1B][0m

    [1B][0;31mE (66316) dp83848: @enprevo REG[0x14] val[0x0][1B][0m

    [1B][0;31mE (66321) dp83848: @enprevo REG[0x15] val[0x0][1B][0m

    [1B][0;31mE (66326) dp83848: @enprevo REG[0x16] val[0x100][1B][0m

    [1B][0;31mE (66331) dp83848: @enprevo REG[0x17] val[0x21][1B][0m

    [1B][0;31mE (66336) dp83848: @enprevo REG[0x18] val[0x0][1B][0m

    [1B][0;31mE (66341) dp83848: @enprevo REG[0x19] val[0x8021][1B][0m

    [1B][0;31mE (66347) dp83848: @enprevo REG[0x1a] val[0x904][1B][0m

    [1B][0;31mE (66352) dp83848: @enprevo REG[0x1b] val[0x0][1B][0m

    [1B][0;31mE (66357) dp83848: @enprevo REG[0x1c] val[0x0][1B][0m

    [1B][0;31mE (66362) dp83848: @enprevo REG[0x1d] val[0x6011][1B][0m

    [1B][0;31mE (66368) dp83848: @enprevo REG[0x1e] val[0x3f][1B][0m

    We are using a standard Ethernet cable (actually we tested with several of them obatining the very same results)

  • Hi Matteo,

    Thank you for providing this. I have two experiments for you to try with the PHYs linked together:

    1. Force the PHY in either MDI or MDIX and see if that helps resolve your issue. You can force MDI/MDIC via register 0x19[15:14].

    2. If you haven't already, try using a longer ethernet cable.

    Best regards,

    Melissa

  • Hi Melissa,

    I tried to change values of reg 0x19 as you suggested.

    With bit[15:14] set to 1, i.e. 

    dp83848: REG[0x19] val[0xc021]
    

    Nothing happens.


    With bit[15:14] set to 1, i.e. 

    dp83848: REG[0x19] val[0x21]


    happens that on ONE board it works, but using other 3 boards it doesn't work.

    I mean that with 100MB switch it works, but connected to the NETGEAR GB router it's not working. 
    On device #1 when connected:
    
    E (53930) dp83848: @enprevo REG[0x0] val[0x3000]
    E (53931) dp83848: @enprevo REG[0x1] val[0x786d]
    E (53931) dp83848: @enprevo REG[0x2] val[0x2000]
    E (53936) dp83848: @enprevo REG[0x3] val[0x5c90]
    E (53941) dp83848: @enprevo REG[0x4] val[0xa1]
    E (53946) dp83848: @enprevo REG[0x5] val[0xcde1]
    E (53951) dp83848: @enprevo REG[0x6] val[0xd]
    E (53956) dp83848: @enprevo REG[0x7] val[0x2801]
    E (53961) dp83848: @enprevo REG[0x8] val[0x0]
    E (53966) dp83848: @enprevo REG[0x9] val[0x0]
    E (53971) dp83848: @enprevo REG[0xa] val[0x0]
    E (53976) dp83848: @enprevo REG[0xb] val[0x0]
    E (53981) dp83848: @enprevo REG[0xc] val[0x0]
    E (53986) dp83848: @enprevo REG[0xd] val[0x0]
    E (53991) dp83848: @enprevo REG[0xe] val[0x0]
    E (53996) dp83848: @enprevo REG[0xf] val[0x0]
    E (54001) dp83848: @enprevo REG[0x10] val[0x611]
    E (54007) dp83848: @enprevo REG[0x11] val[0x0]
    E (54012) dp83848: @enprevo REG[0x12] val[0x0]
    E (54017) dp83848: @enprevo REG[0x13] val[0x0]
    E (54022) dp83848: @enprevo REG[0x14] val[0x0]
    E (54027) dp83848: @enprevo REG[0x15] val[0x0]
    E (54032) dp83848: @enprevo REG[0x16] val[0x100]
    E (54037) dp83848: @enprevo REG[0x17] val[0x21]
    E (54043) dp83848: @enprevo REG[0x18] val[0x0]
    E (54048) dp83848: @enprevo REG[0x19] val[0x21]
    E (54053) dp83848: @enprevo REG[0x1a] val[0x904]
    E (54058) dp83848: @enprevo REG[0x1b] val[0x0]
    E (54063) dp83848: @enprevo REG[0x1c] val[0x0]
    E (54068) dp83848: @enprevo REG[0x1d] val[0x6011]
    E (54074) dp83848: @enprevo REG[0x1e] val[0x83e]
    
    on Device #1 When cable disconnected:
    14:E (29920) dp83848: @enprevo REG[0x0] val[0x3000]
    15:E (29921) dp83848: @enprevo REG[0x1] val[0x7849]
    16:E (29921) dp83848: @enprevo REG[0x2] val[0x2000]
    17:E (29926) dp83848: @enprevo REG[0x3] val[0x5c90]
    18:E (29931) dp83848: @enprevo REG[0x4] val[0xa1]
    19:E (29936) dp83848: @enprevo REG[0x5] val[0x0]
    20:E (29941) dp83848: @enprevo REG[0x6] val[0x4]
    21:E (29946) dp83848: @enprevo REG[0x7] val[0x2001]
    22:E (29951) dp83848: @enprevo REG[0x8] val[0x0]
    23:E (29956) dp83848: @enprevo REG[0x9] val[0x0]
    24:E (29961) dp83848: @enprevo REG[0xa] val[0x0]
    25:E (29966) dp83848: @enprevo REG[0xb] val[0x0]
    26:E (29971) dp83848: @enprevo REG[0xc] val[0x0]
    27:E (29976) dp83848: @enprevo REG[0xd] val[0x0]
    28:E (29981) dp83848: @enprevo REG[0xe] val[0x0]
    29:E (29986) dp83848: @enprevo REG[0xf] val[0x0]
    30:E (29991) dp83848: @enprevo REG[0x10] val[0x0]
    31:E (29996) dp83848: @enprevo REG[0x11] val[0x0]
    32:E (30001) dp83848: @enprevo REG[0x12] val[0x0]
    33:E (30006) dp83848: @enprevo REG[0x13] val[0x0]
    34:E (30012) dp83848: @enprevo REG[0x14] val[0x0]
    35:E (30017) dp83848: @enprevo REG[0x15] val[0x0]
    36:E (30022) dp83848: @enprevo REG[0x16] val[0x100]
    37:E (30027) dp83848: @enprevo REG[0x17] val[0x21]
    38:E (30032) dp83848: @enprevo REG[0x18] val[0x0]
    39:E (30037) dp83848: @enprevo REG[0x19] val[0x21]
    40:E (30042) dp83848: @enprevo REG[0x1a] val[0x904]
    41:E (30048) dp83848: @enprevo REG[0x1b] val[0x0]
    42:E (30053) dp83848: @enprevo REG[0x1c] val[0x0]
    43:E (30058) dp83848: @enprevo REG[0x1d] val[0x6011]
    44:E (30063) dp83848: @enprevo REG[0x1e] val[0x3f]
    
    
    On Device #2 -> no LED, no connection when cable is put inside the socket
    E (12209) dp83848: @enprevo REG[0x0] val[0x3000]
    E (12210) dp83848: @enprevo REG[0x1] val[0x7849]
    E (12210) dp83848: @enprevo REG[0x2] val[0x2000]
    E (12214) dp83848: @enprevo REG[0x3] val[0x5c90]
    E (12220) dp83848: @enprevo REG[0x4] val[0xa1]
    E (12225) dp83848: @enprevo REG[0x5] val[0x0]
    E (12230) dp83848: @enprevo REG[0x6] val[0x4]
    E (12235) dp83848: @enprevo REG[0x7] val[0x2001]
    E (12240) dp83848: @enprevo REG[0x8] val[0x0]
    E (12245) dp83848: @enprevo REG[0x9] val[0x0]
    E (12250) dp83848: @enprevo REG[0xa] val[0x0]
    E (12255) dp83848: @enprevo REG[0xb] val[0x0]
    E (12260) dp83848: @enprevo REG[0xc] val[0x0]
    E (12265) dp83848: @enprevo REG[0xd] val[0x0]
    E (12270) dp83848: @enprevo REG[0xe] val[0x0]
    E (12275) dp83848: @enprevo REG[0xf] val[0x0]
    E (12280) dp83848: @enprevo REG[0x10] val[0x0]
    E (12285) dp83848: @enprevo REG[0x11] val[0x0]
    E (12290) dp83848: @enprevo REG[0x12] val[0x0]
    E (12295) dp83848: @enprevo REG[0x13] val[0x0]
    E (12300) dp83848: @enprevo REG[0x14] val[0x0]
    E (12305) dp83848: @enprevo REG[0x15] val[0x0]
    E (12311) dp83848: @enprevo REG[0x16] val[0x100]
    E (12316) dp83848: @enprevo REG[0x17] val[0x21]
    E (12321) dp83848: @enprevo REG[0x18] val[0x0]
    E (12326) dp83848: @enprevo REG[0x19] val[0x21]
    E (12331) dp83848: @enprevo REG[0x1a] val[0x904]
    E (12336) dp83848: @enprevo REG[0x1b] val[0x0]
    E (12342) dp83848: @enprevo REG[0x1c] val[0x0]
    E (12347) dp83848: @enprevo REG[0x1d] val[0x6011]
    E (12352) dp83848: @enprevo REG[0x1e] val[0x3f]
    

    I also tried with cable with 0.5m lenght or 5m lenght, and it's the same behaviour.

  • Hi Matteo,

    Thank you for setting this up. Just to make sure, are all the PHY boards the exact same as the schematic/layout you sent me? I have other experiments for you to try:

    1. Set 0x19[14] to 1 again but this time, also restart autonegotiation after in register 0x00[9]

    2. Could you also try linking up two PHYs and forcing them into a single speed by disabling autonegotiation in register 0x00[12] (on both PHYs) and only enabling 100BASE-TX Full Duplex Support (0x04[8]=1 ) and disabling 10BASE-T Full Duplex Support (0x04[6]=0)

    happens that on ONE board it works, but using other 3 boards it doesn't work.

    Are you saying that when you connect two PHY boards together, the register write only works for 1/4 of the boards?

    I mean that with 100MB switch it works, but connected to the NETGEAR GB router it's not working. 

    What is the Netgear GB router part #?

    I also tried with cable with 0.5m lenght or 5m lenght, and it's the same behaviour.

    Do you have a 10m cable by chance?

    Best regards,

    Melissa

  • 1. Set 0x19[14] to 1 again but this time, also restart autonegotiation after in register 0x00[9]

    Done, but this will not resolve the issue.
    The LED green is off.

    After startup situation is this:

          eth->phy_reg_write(eth, addr, 0x19, 0xC021);
          eth->phy_reg_write(eth, addr, 0x00, 0x3200);
    
    Then:
    
    E (8509) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x0] val[0x3000]
    E (8510) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1] val[0x7849]
    E (8515) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x2] val[0x2000]
    E (8524) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x3] val[0x5c90]
    E (8532) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x4] val[0xa1]
    E (8540) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x5] val[0x0]
    E (8548) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x6] val[0x4]
    E (8556) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x7] val[0x2001]
    E (8564) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x8] val[0x0]
    E (8572) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x9] val[0x0]
    E (8580) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xa] val[0x0]
    E (8588) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xb] val[0x0]
    E (8596) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xc] val[0x0]
    E (8604) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xd] val[0x0]
    E (8612) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xe] val[0x0]
    E (8620) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xf] val[0x0]
    E (8628) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x10] val[0x4000]
    E (8637) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x11] val[0x0]
    E (8645) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x12] val[0x0]
    E (8653) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x13] val[0x0]
    E (8661) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x14] val[0x0]
    E (8669) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x15] val[0x0]
    E (8677) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x16] val[0x100]
    E (8686) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x17] val[0x21]
    E (8694) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x18] val[0x0]
    E (8702) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x19] val[0xc021]
    E (8710) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1a] val[0x904]
    E (8719) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1b] val[0x0]
    E (8727) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1c] val[0x0]
    E (8735) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1d] val[0x6011]
    E (8743) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1e] val[0x3f]

    2. Could you also try linking up two PHYs and forcing them into a single speed by disabling autonegotiation in register 0x00[12] (on both PHYs) and only enabling 100BASE-TX Full Duplex Support (0x04[8]=1 ) and disabling 10BASE-T Full Duplex Support (0x04[6]=0)

    Connecting two equal boards, the result is: NO LED ON.

    Registers are:

    E (30612) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x7] val[0x2001]
    E (30621) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x8] val[0x0]
    E (30629) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x9] val[0x0]
    E (30637) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xa] val[0x0]
    E (30645) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xb] val[0x0]
    E (30653) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xc] val[0x0]
    E (30661) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xd] val[0x0]
    E (30669) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xe] val[0x0]
    E (30677) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xf] val[0x0]
    E (30686) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x10] val[0x0]
    E (30694) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x11] val[0x0]
    E (30702) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x12] val[0x0]
    E (30710) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x13] val[0x0]
    E (30718) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x14] val[0x0]
    E (30726) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x15] val[0x0]
    E (30735) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x16] val[0x100]
    E (30743) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x17] val[0x21]
    E (30751) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x18] val[0x0]
    E (30760) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x19] val[0x8021]
    E (30768) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1a] val[0x904]
    E (30776) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1b] val[0x0]
    E (30785) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1c] val[0x0]
    E (30793) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1d] val[0x6011]
    E (30801) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1e] val[0x83e]
    

    Connecting to a Home Router / Gateway (NETGEAR), in this case (DHCP is not working properly, see note below) the green LED is ON and registers are:

    E (6575) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x0] val[0x2000]
    E (6576) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1] val[0x7849]
    E (6581) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x2] val[0x2000]
    E (6590) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x3] val[0x5c90]
    E (6598) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x4] val[0x1a1]
    E (6606) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x5] val[0x0]
    E (6614) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x6] val[0x4]
    E (6622) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x7] val[0x2001]
    E (6631) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x8] val[0x0]
    E (6639) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x9] val[0x0]
    E (6647) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xa] val[0x0]
    E (6655) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xb] val[0x0]
    E (6663) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xc] val[0x0]
    E (6671) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xd] val[0x0]
    E (6679) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xe] val[0x0]
    E (6687) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xf] val[0x0]
    E (6695) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x10] val[0x601]
    E (6703) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x11] val[0x0]
    E (6711) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x12] val[0x0]
    E (6719) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x13] val[0x0]
    E (6727) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x14] val[0x0]
    E (6735) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x15] val[0x0]
    E (6744) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x16] val[0x100]
    E (6752) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x17] val[0x21]
    E (6760) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x18] val[0x0]
    E (6768) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x19] val[0x8021]
    E (6776) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1a] val[0x904]
    E (6785) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1b] val[0x0]
    E (6793) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1c] val[0x0]
    E (6801) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1d] val[0x6011]
    E (6809) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1e] val[0x83e]
    

    but when connected to another switch, a professional one in our company rack, the  LED is not green and registers are:

    E (10574) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x7] val[0x2001]
    E (10583) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x8] val[0x0]
    E (10591) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x9] val[0x0]
    E (10599) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xa] val[0x0]
    E (10607) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xb] val[0x0]
    E (10615) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xc] val[0x0]
    E (10623) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xd] val[0x0]
    E (10631) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xe] val[0x0]
    E (10639) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xf] val[0x0]
    E (10648) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x10] val[0x0]
    E (10656) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x11] val[0x0]
    E (10664) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x12] val[0x0]
    E (10672) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x13] val[0x0]
    E (10680) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x14] val[0x0]
    E (10689) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x15] val[0x0]
    E (10697) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x16] val[0x100]
    E (10705) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x17] val[0x21]
    E (10713) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x18] val[0x0]
    E (10722) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x19] val[0x8021]
    E (10730) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1a] val[0x904]
    E (10738) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1b] val[0x0]
    E (10747) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1c] val[0x0]
    E (10755) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1d] val[0x6011]
    E (10763) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1e] val[0x83e]
    

    but when connected to another switch like home router / gateway, the  LED is not green and registers are:

    E (10574) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x7] val[0x2001]
    E (10583) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x8] val[0x0]
    E (10591) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x9] val[0x0]
    E (10599) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xa] val[0x0]
    E (10607) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xb] val[0x0]
    E (10615) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xc] val[0x0]
    E (10623) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xd] val[0x0]
    E (10631) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xe] val[0x0]
    E (10639) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xf] val[0x0]
    E (10648) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x10] val[0x0]
    E (10656) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x11] val[0x0]
    E (10664) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x12] val[0x0]
    E (10672) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x13] val[0x0]
    E (10680) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x14] val[0x0]
    E (10689) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x15] val[0x0]
    E (10697) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x16] val[0x100]
    E (10705) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x17] val[0x21]
    E (10713) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x18] val[0x0]
    E (10722) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x19] val[0x8021]
    E (10730) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1a] val[0x904]
    E (10738) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1b] val[0x0]
    E (10747) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1c] val[0x0]
    E (10755) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1d] val[0x6011]
    E (10763) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1e] val[0x83e]
    

    on another switch LED green is ON, DHCP is okay and device GOT IP and registers are:

    E (8529) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x0] val[0x2100]
    E (8530) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1] val[0x784d]
    E (8535) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x2] val[0x2000]
    E (8543) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x3] val[0x5c90]
    E (8552) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x4] val[0xa1]
    E (8560) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x5] val[0x0]
    E (8568) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x6] val[0x4]
    E (8576) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x7] val[0x2001]
    E (8584) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x8] val[0x0]
    E (8592) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x9] val[0x0]
    E (8600) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xa] val[0x0]
    E (8608) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xb] val[0x0]
    E (8616) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xc] val[0x0]
    E (8624) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xd] val[0x0]
    E (8632) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xe] val[0x0]
    E (8640) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0xf] val[0x0]
    E (8648) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x10] val[0x605]
    E (8656) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x11] val[0x0]
    E (8665) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x12] val[0x0]
    E (8673) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x13] val[0x0]
    E (8681) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x14] val[0x0]
    E (8689) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x15] val[0x0]
    E (8697) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x16] val[0x100]
    E (8705) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x17] val[0x21]
    E (8713) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x18] val[0x0]
    E (8722) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x19] val[0x8021]
    E (8730) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1a] val[0x904]
    E (8738) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1b] val[0x0]
    E (8746) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1c] val[0x0]
    E (8754) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1d] val[0x6011]
    E (8763) dp83848: @enprevo F[dp83848_update_link_duplex_speed] REG[0x1e] val[0x83e]
    

    What is the Netgear GB router part #?

    This is the datasheet : https://www.downloads.netgear.com/files/GDC/datasheet/en/D1500.pdf

    Do you have a 10m cable by chance?

    Tried also this, but it's not changing behavior.


    A notice about DHCP:


    Another thing I want to add, and is that EVEN in case of LED ON, the gateway is not communicating properly with the gateway: the ARP protocol seems not working well and DHCP request is broken and device is not able to get the IP address.

    The situation is not happening if we put:

    Gateway --> long cable --> switch 100MB fast ethernet --> our board.

    in this case, the gateway is able to perform DHCP request properly.

    Connecting directly to the gateway, this will not happens: DHCP seems to have issues on assigning IP address.

  • Hi Matteo,

    Thank you for providing this information. Do you think you would be able to provide the gerber or alitum files of your layout? You previously sent me the PDF but now I want to do a more in depth review of your layout where I can do measurements.

    2. Could you also try linking up two PHYs and forcing them into a single speed by disabling autonegotiation in register 0x00[12] (on both PHYs) and only enabling 100BASE-TX Full Duplex Support (0x04[8]=1 ) and disabling 10BASE-T Full Duplex Support (0x04[6]=0)

    Connecting two equal boards, the result is: NO LED ON.

    So were the results of the experiments that you listed here that forcing autonegotiation only fixed some of the connections between your custom board and the routers? I noticed that in some of the dumps, you left out 0x0-0x6, could I assume they were the same as before when there was no connection?

    Another thing I want to add, and is that EVEN in case of LED ON, the gateway is not communicating properly with the gateway: the ARP protocol seems not working well and DHCP request is broken and device is not able to get the IP address.

    Thank you for providing this. Would you be able to probe your MDI signal, I'm wondering about the quality of the signal. You can read more about how to do it in Section 3.4.7 in this app note: https://www.ti.com/lit/an/snla246b/snla246b.pdf?ts=1687962728615&ref_url=https%253A%252F%252Fwww.google.com%252F 

    - Please make sure the oscillator meets our requirements (a 50-MHz 0.005% (±50 ppm) CMOS-level oscillator source ) RMII mode

    I just wanted to confirm that you checked this as well and that RBIAS has a 1% tolerance.

    Best regards,

    Melissa

  • Do you think you would be able to provide the gerber or alitum files of your layout? You previously sent me the PDF but now I want to do a more in depth review of your layout where I can do measurements.

    Just sent by private message the gerber files. 

    So were the results of the experiments that you listed here that forcing autonegotiation only fixed some of the connections between your custom board and the routers? I noticed that in some of the dumps, you left out 0x0-0x6, could I assume they were the same as before when there was no connection?

    Yes, it basically worked only with one gateway, for all the other 6 we got problems with the ARP protocol that seems not working well, DHCP request is broken and the devices are not able to get the IP address.

    - Please make sure the oscillator meets our requirements (a 50-MHz 0.005% (±50 ppm) CMOS-level oscillator source ) RMII mode

    I just wanted to confirm that you checked this as well and that RBIAS has a 1% tolerance.

    The OSC tollerance is 30 ppm, and RBIAS is 0.1%.

    Best regards

    Matteo

     

  • Hi Matteo,

    Thank you for providing your gerber files. I will need sometime to process and review them. Expect to hear back sometime tomorrow.

    Best regards,

    Melissa

  • Hi Matteo,

    Thank you for your patience. I will message I want to narrow down the issue - if it signal integrity related, I wonder if you would be able to communicate with both PHYs at a lower speed. 

    Could you also try these test:

    1. Could you also try linking up two PHYs and forcing them into a single speed by disabling autonegotiation in register 0x00[12] (on both PHYs) and only enabling 10BASE-T Full Duplex Support and disabling 100BASE-TX Full Duplex Support. And then could you provide the full dump for each PHY?

    2. Are you able to probe your MDI signals at all?

    Best regards,

    Melissa