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DS160PT801: Register sequence to enable compliance or PRBS pattern in GEN4

Tony Zabinski
Prodigy 110 points

Part Number: DS160PT801

Hi,

I wonder if you could provide a register sequence that would allow eye margining even though link training hasn't succedded (or has dropped due to margining)?

Typically I'd use Compliance pattern, but using the compliance EEPROM, I always end up at Gen1 speed, due to link training failure.

I've tried the compliance sequence from the DS160PT801 Configuration Guide, with the same results.

Possibly PRBS pattern might be a better fit...

I have our x4 interface connected to DS160PT801EVB, and want to sweep CTLE, DFE and TX FIR to see where optimal settings are.

Thanks,

tony