hi,
my customer use SN65LVDS179 to implement the communication between LVDS and LVPECL (from SFP optical module) . its schematic and SFP's LVPECL output parameters are included in the attach. Pls kindly help check if the schematic is right? any recommendation for pull up and pull down resistors for PIN5---7?
Hello Ken,
See my feedback below:
TX: Is there a reason the customer added a biasing circuit on the differential lines, Pins Z and Y? The LVDS driver already outputs a 1.2V common mode. Regardless, any common mode voltage will be removed by the internal capacitors at the SFP module inputs. The customer can remove the resistors to lower power consumption.
RX: The 100Ω termination resistor and a biasing circuit (~1.2V) is required since the signal is AC coupled. To improve DC balancing and minimize differential skew, I would recommend the biasing circuit below. Another thing to keep in mind is when converting LVPECL → LVDS, the signal amplitude will need to be reduced to 600mVpp (max). A series resistor, like R238 & R248, usually does the trick.
The above schematic was taken from How to Terminate LVDS Connections.
Regards,
Josh
