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TUSB2077A Reset Pulse Duration

Jacob Kogan
Prodigy 40 points
Other Parts Discussed in Thread: TUSB2077A

We have an existing design that we support where the reset pulse duration is set by the RC circuit of 150 KOhm and 0.1 uF. We see an intermittent failure of the chip to initialize. The data sheet calls for the reset pulse duration of 200 usec to 1 msec. What happens if the reset pulse is longer than specified? The clockfrequency is generated by the oscillator inside the TUSB2077A. I saw a post in this forum, recommending the RC values resulting in longer than 1 msec reset pulse duration.

  • 0
    TI__Guru* 76130 points

    Hello Jacob,

    Per USB specification, a USB device must be able to respond to the host within 100ms after power is applied, a too long reset pulse could cause not to meet this spec.

    The specification on TUSB277B datasheet applies after the power rails reaches its 90%.

    In order to meet the above requirements we recommend a reset pulse duration between 1 and 2.5 ms.  You can achieve this using a RC circuit with 0.1uF and 20K.

    Regards.

  • 0 in reply to Elias Villegas M.
    Prodigy 40 points

    Hello Elias;

    We have a problem initializing TUSB2077A itself. The host microcontroller reads zeros in TUSB2077A ID. By recomending the pulse duration of 1 to 2.5 msec you are contradicting the following data sheet statement:

     

    RESET is an active low TTL input with hysteresis and must be asserted at power up. When RESET is asserted,

    RESET 6 I all logic is initialized. Generally, a reset with a pulse width between 100

     

    μs and 1 ms is recommended after 3.3-V

    V

     

    CC reaches its 90%. Clock signal has to be active during the last 60 μs of the reset window.

    Also in SLLA314–March 2011, I quote:

    Texas Instruments recommends a minimum of 100 μs to a maximum of 1 ms of reset timing. If the hub

    is held in reset for a longer period of time, it can fail to respond promptly to USB host signaling and not

    complete enumeration. This is typically an issue with embedded system applications.

     

    That's what we think we see. Please comment. Thanks,

    Jacob.

  • 0 in reply to Jacob Kogan
    TI__Guru* 76130 points

    It is OK to have a reset pulse between 100us and 1ms (<2.5 ms would work as well).

    Could you share your schematics for review?

    Regards.

  • 0 in reply to Elias Villegas M.
    Prodigy 40 points

    Yes. I can send you the page showing the circuit. Please let me know how to do that. The easiest for me would probably be to send you a direct e-mail. But I do not know how to get to it.

    Thanks.

  • 0 in reply to Jacob Kogan
    TI__Guru* 76130 points

    You can send them to elias.villegas@ti.com

    Regards.