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What is recommended hardware configuration when connecting multiple SPI slave devices?

Other Parts Discussed in Thread: CC2642R, SN74LVC1G125

Using a CC2642R SPI connected to 4 devices on a shared SPI bus.  The MISO and MOSI pins are pulled up with 10k and the SCK pulled down with 10k.

To avoid potential damage to IO pins, is it recommended to use current limiting resistors on MISO/MOSI between the devices and to the micro?

Should the SCK be buffered with a gate buffer, like SN74LVC1G125?  Or no necessary?

  • Hi Brent,

    1. These I/O pins have internal current limit via the current load select so external current limiting resistors is not necessary.

    2. Assuming your MISO / MOSI have the same delays / line length, a gate buffer is not needed.

    Best regards,

    Bun