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TCA6416A: Startup Sequence - I2C Bus Status

Part Number: TCA6416A
Other Parts Discussed in Thread: TCA6416, TCAL6416

Hi Team,

We would like to have the following startup sequence, Vcci, Vccp, Reset_high. It's noted in the DS that it is recommended Vccp should come up before Vcci, with the RESET being held low until both supplies are settled, do you see any potential issue or is the startup sequence valid?

Also, we will have I2C bus traffic talking to other devices while the TCA6416A will only have Vcci powered, (Vccp = 0V, Reset_LOW), is this possible or will the TCA6416 hold the bus low, or create a voltage divider preventing communication on the I2C bus? 

Thank you,

Alex

  • Hi Alex,

    We would like to have the following startup sequence, Vcci, Vccp, Reset_high. It's noted in the DS that it is recommended Vccp should come up before Vcci, with the RESET being held low until both supplies are settled, do you see any potential issue or is the startup sequence valid?

    We noticed this phenomena when testing VCCP and VCCI power supply ramping. We generally recommend supply VCCP before VCCI in order to ensure that the SDA doesn't get stuck low. I don't think we ever tested this while holding /RESET LOW as well. It would make sense that upon power up that this start up sequence would be okay since the /RESET is held LOW. I don't see any potential issues at the moment as long as the abs. max values are respected. 

    We recommend to customers to upgrade to the TCAL6416. TCAL6416 is built with newer process technology, fixes the VCCP and VCCI potential stuck bus issue, and offers agile I/O capabilities on the p-port pins. 

    Also, we will have I2C bus traffic talking to other devices while the TCA6416A will only have Vcci powered, (Vccp = 0V, Reset_LOW), is this possible or will the TCA6416 hold the bus low, or create a voltage divider preventing communication on the I2C bus? 

    The VCCI power is for the main I2C bus, and the VCCP supply is for the p-port voltages If there is signaling occurring on the I2C side, the only time TCA6416 would "disrupt" communication is whether it saw its own slave address in which is would then ACK on the bus. I don't foresee a possible holding of the bus stuck low, or a voltage divider to be created on the I2C side. 

    Regards,

    Tyler

  • Hi Tyler,

    Thank you for the details. 

    Just to confirm I understand correctly. Is it safe to say that SCL and SDA are Hi-Z while the device is in reset? Are there any ESD cells that are active that could cause the voltage to get clamped or cause extra capacitance on the line in this state?

    Thanks,

    Alex

  • Hi Alex,

    SCL and SDA are both high-Z inputs (with SDA being an output for 9th bit ACK) that go to an input filter before going to I2C bus control block. Leakage for these pins are around 0.1uA when the input voltage is VCCI or GND. Input impedance is in the mega-ohm range. 

    There are input output clamp currents listed in the absolute maximum ratings in the datasheet. This spec indicates that there are some protection diodes on the input and output pins both on P-ports, SDA, /INT. I don't think that there is a possibility of an ESD cell clamping the SDA line. 

    There is general input cap to the SDA/SCL pins. This is found in the datasheet as the Cio parameter:

    Regards,

    Tyler