In the scenario of an ESD pulse coming into the LVDS output, what would that look like? Is there an I/O schematic for this or a similar part?
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Hi James
The DS90C031 differential line driver or similar LVDS is a current mode driver which mean it has a high output impedance to maintain a constant current for a range of loads. So the output is not terminated by 100Ω for impedance matching. Pls refer to this apps note on how to terminate the device for best signal integrity.
BR
Yuan