Dear Team,
I am interfacing SN65DSI83TPAPRQ1 with SC206E.
The schematic is attached along with this mail. Could you please check it
The common mode choke used is ICMEF112P900MFR . May I know is this choke is fine for LVDS
Regards
HARI
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Dear Team,
I am interfacing SN65DSI83TPAPRQ1 with SC206E.
The schematic is attached along with this mail. Could you please check it
The common mode choke used is ICMEF112P900MFR . May I know is this choke is fine for LVDS
Regards
HARI
Hi Hari,
1. A 4.7k pull up resistor is recommended for the ADDR pin.
2. It is recommended to utilize a reference clock. The DSI83-Q1 uses either the DSI clock or the REFCLK to generate the LVDS clock, and the REFCLK is typically cleaner than the DSI clock.
The common mode choke is fine for LVDS.
Thanks, Allison
Hi Hari,
For your reference, this is the REFCLK used on the DSI83EVM. This is one reference clock implementation you can duplicate. You can also use any external reference clock, as long as it supports a frequency of 12 MHz, 19.2 MHz, 26 MHz, 27 MHz, or 38.4 MHz.
Best, Allison