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DP83869HM: Pin States

Bettina Wyss
Prodigy 50 points
Part Number: DP83869HM

Hi,

I have some questions related to the pin states tables (7-2 to 7-4) and the pin function table 7-1 and about the general interpretation of the column PULL/HI-Z in table 7-2 to 7-4. 

Is it correct, that this column PULL/HI-Z  shows the internal configuration of the pin in the respective mode? 

Why is, e.g. for pin INT_N/PWDN_n, the type column in table 7-1 empty, but in table 7-2 column PULL/Hi-Z we always have a PD, OD-PD? Shouldn't this pin be WPU in table 7-1, then? What is the difference between PD and OD-PD? Because  we have here a PU in reset state, can I leave the pin open if I do not use the power down function?

Also for Pin 22, JTAG_TDO/GPIO_1, there is no info in table 7-1 that this is also a strap pin? Same for pin 23, JTAG_TMS / SUPPLYMODE_SEL. 

Also for JTAG_TMS / SUPPLYMODE_SEL, for all modes we have PU in table 7-1 to 7-4, but in chapter 11 it is stated that this pin MUST be pulled high for triple-supply mode. Why, if we have internal PU?

Thank you for clarification. 

Regards, Betty 

  • +1
    TI__Mastermind 25955 points

    Hi Bettina,

    • During the Reset state, INT_N/PWDN_n pin will always PU
    • the difference between PD and OD-PD is pull down and open drain-driver pull down
    • Thank you for pointing out JTAG/GPIO_1 in table 7-1. We will add the strap description on the table 7-1 in the new datasheet revision
    • JTAG_TMS/SUPPLY_SEL is not a strap pin
    • JTAG_TMS/SUPPLY_SEL is not required to have a Pull High on three power supply system

    --

    Regards,

    Hillman Lin