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DP83825I: Need info for DP83825I DTS to call driver or load

Part Number: DP83825I
Other Parts Discussed in Thread: SYSCONFIG

Hi,

We are looking for DP83825I driver info.

got below info for dp83822.

Documentation/devicetree/bindings/net/ti,dp83822.yaml

For driver do we need to pass compatible driver string ? (compatible = "TI DP83825I " / compatible= "ti, dp83822")

1.300022] davinci_mdio 8000f00.mdio: phy[1]: device 8000f00.mdio:01, driver unknown

One more question will it affect suppose mdio - 0/1 provide?

in my schematic mdio0 is there for below function pins

main_mdio0_pins_default: main_mdio0-pins-default { 
pinctrl-single,pins = <
AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */

Thanks,

suraj.

  • Hi Suraj,

    You should not need to change your .yaml file.

    One more question will it affect suppose mdio - 0/1 provide?

    What do you mean by this question? Are you asking about error '1.300022] davinci_mdio 8000f00.mdio: phy[1]: device 8000f00.mdio:01, driver unknown'? This may be caused by errors in your driver configuration files - please check those. 

    Best regards,
    Melissa

  • Hi Melissa,

    thanks for response!

    Will try to provide our driver config.

    Actually we are using DP83825I so will provide CONFIG_DP83825I_PHY=y let me know if it is fine or need to provide extra.

    and for DTS binding. this we have structure.

    &cpsw3g {
    pinctrl-names = "default";
    pinctrl-0 = <&main_mdio1_pins_default
    &main_rgmii1_pins_default
    &main_rmii2_pins_default>;
    };

    &cpsw_port1 {
    phy-mode = "rgmii-rxid";v
    phy-handle = <&cpsw3g_phy0>;
    };

    &cpsw_port2 {
    phy-mode = "rmii";
    phy-handle = <&cpsw3g_phy1>;
    };

    &cpsw3g_mdio {
    cpsw3g_phy0: ethernet-phy@0 {
    reg = <0>;
    rx-internal-delay-ps = <1>;
    tx-internal-delay-ps = <1>;
    };

    cpsw3g_phy1: ethernet-phy@1 {
    reg = <1>;

    reset-gpios = <&main_gpio1 5 GPIO_ACTIVE_LOW>;
    reset-assert-us = <25>;
    reset-deassert-us = <60000>; /* T1 */
    rx-internal-delay-ps = <1>;
    tx-internal-delay-ps = <1>;

    };
    };

    For pinmuxing this is we have and we are dealing with phy1 only and rmii2. 

    main_rmii2_pins_default: main_rmii2-pins-default { 
    pinctrl-single,pins = <
    AM62X_IOPAD(0x0184, PIN_INPUT, 1) /* (AE23) RMII2_RXD0 */
    AM62X_IOPAD(0x0188, PIN_INPUT, 1) /* (AB20) RMII2_RXD1 */
    AM62X_IOPAD(0x0180, PIN_INPUT, 1) /* (AD23) RMII2_REF_CLK */

    AM62X_IOPAD(0x017c, PIN_INPUT, 1) /* (AD22) RMII2_RX_ER */
    AM62X_IOPAD(0x016c, PIN_OUTPUT, 1) /* (Y18) RMII2_TXD0 */
    AM62X_IOPAD(0x0170, PIN_OUTPUT, 1) /* (AA18) RMII2_TXD1 */
    AM62X_IOPAD(0x0168, PIN_INPUT, 1) /* (AE21) RMII2_CRS_DV */
    AM62X_IOPAD(0x0164, PIN_OUTPUT, 1) /* (AA19) RMII2_TX_EN */

    AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) GPIO1_5 (PHY_RESET) */
    AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) GPIO1_6 */
    AM62X_IOPAD(0x0174, PIN_INPUT, 7) /* (AD21) GPIO0_91 */
    AM62X_IOPAD(0x0178, PIN_INPUT, 7) /* (AC20) GPIO1_0 */
    >;
    };
    main_rgmii1_pins_default: main_rgmii1-pins-default {
    pinctrl-single,pins = <
    AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
    AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
    AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
    AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
    AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
    AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
    AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
    AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
    AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
    AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
    AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
    AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
    >;
    };

    For mdio pinmux this we are using

    main_mdio1_pins_default: main_mdio1-pins-default { 
    pinctrl-single,pins = <
    AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
    AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
    >;
    };

     

    Other than this nothing we updated or changed for ethernet.

    Let me know if anything if i miss here.

    Thanks,

    Suraj.

  • Hi Suraj,

    I am looping in the Siatra MPU team to assist you on this issue, they should respond within the next day or so. 

    Best regards,

    Melissa

  • Hello Soraj, 

    Can you please  share the interface schematics diagram or the pinmux.

    Regards,

    Sreenivasa

  • Hi ,

    Thanks for your response!

    Here i provided schematic, pinmux , dts binding, console logs as well.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1237307/am625-am625-ethernet-not-working-for-dp83825irmqr/4699279#4699279

    Let me know if anything we need more .

    Thanks,

    Suraj.

  • Hello Soraj, 

    Thank you for the inputs.

    Shuyler is the networking expert and looks like you are discussing on the other thread.

    I can verify the SoC to the DP83825 interface connection if a searchable PDF is provided.

    Regards,

    Sreenivasa

  • Hi team - wanted to update you that this issue is now resolved offline.

    Regards,

    Shashank

  • Hello Shashank,

    Thank you.

    Feel free to add a couple of sentences on the resolution.

    Regards,

    Sreenivasa

  • Resolution:

    1. Modified DTS to reflect the rmii node pins to be the same as the output of TI SysConfig tool.

    2. Added support for TI DP83822/5 PHY inside Linux kernel

    3. Replaced modified kernel and device tree blob in the rootfs - /boot folder

    Tested on client's hardware and confirmed thru videos and images of setup.

    Regards,

    Shashank

  • Hello Shashank,

    Thank you for adding the resolution.

    Regards,

    Sreenivasa