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DS90UB948-Q1: PDB power sequence requirements

Part Number: DS90UB948-Q1

Hi,

       we found that the 948's datasheet has some requirements for PDB pin,( as the below screenshot.)

I want to know how to test t3 & t4.

Now, I will use LOCK pin as indicate is ok or not?   because I  got a message that PDB pin need reset one time, after LOCK is pull-up ,but i am not sure.

Could you help to confirm that both ( LOCK & PDB ) relation ?

thank you!

  • Hi,

    I want to know how to test t3 & t4.

    The power sequence diagram in the datasheet shows the moment power is supplied to the DS90UB948-Q1. If you want to test this you can use an oscilloscope and attach the probes to the PDB pin and the other power rails.

    For this reason we have PDB in the Power Up sequence:

    Could you help to confirm that both ( LOCK & PDB ) relation ?

    Lock is lost when PDB is driven low.

    Best Regards,

    Gil Abarca

  • hello, thank you for you reply!

    I assume that PDB pin needn't reset after LOCK pin pull-up. As you said, when PDB is low, 948 will disable, and the link will unlock.

  • Hi,

    We recommend turning the deserializer after the serializer only because the deserilizer may lock to a random noise. If you do the opposite then you need to drive PDB low in order to make sure that the deserializer locks to the serializer. There is no need for PDB to be driven low after lock unless you turn the 948 before the serializer.

    Best Regards,

    Gil Abarca