SN65DSI86: Renesas RZ/V2L DSI instability with SN65DSI86

Hello,

Can you map HSYNC and VSYNC to GPIO pins and measure their frequency? Table 8-24 in the DSI86 datasheet details the GPIO register mappings.

Please ensure you are following Section 8.4.4.5 DSI Video Transmission Specifications in the datasheet, which is also summarized in the table below.

Thanks, Allison

Hello, thank you for answer!

we have maped HSYNC and VSYNC and measured their frequency.
Mode 6(480p) works fine.
Modeline "Mode 6" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
Measured HSYNC=31.47kHz, VSYNC=59.94Hz

Mode 3 (720p) is blinking and we  observe fail flags: DPTL_UNEXPECTED_VSYNC_ERR, DPTL_UNEXPECTED_HSYNC_ERR, DPTL_UNEXPECTED_PIXEL_DATA_ERR, LOSS_OF_DP_SYNC_LOCK_ERR, CHA_SOT_SYNC_ERR.
Modeline "Mode 3" 74.250 1280 1390 1420 1650 720 725 730 750 +hsync +vsync
Measured HSYNC= 45kHz, VSYNC=60Hz

Mode 1 (1080p) doesn't work at all and we observe fail flags: DPTL_UNEXPECTED_VSYNC_ERR, DPTL_UNEXPECTED_HSYNC_ERR, DPTL_UNEXPECTED_PIXEL_DATA_ERR, LOSS_OF_DP_SYNC_LOCK_ERR, CHA_SOT_SYNC_ERR.
Modeline "Mode 1" 148.500 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync
measured HSYNC= 67.5KHz , VSYNC=60Hz

Hello,

Thank you for sharing these. Can you please also include the register dump?

Also, can you put the scope in persistent mode when you measure HSYNC and VSYNC? This would ensure that HSYNC and VSYNC are constant.

Thanks, Allison

Hello,
HSYNC и VSYNC persistent mode, for 1080p that doesn't work


And registers dump for different modes.
Mode 6(480p) works fine.
Modeline "Mode 6" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync

480p ref

root@trustbox:~# i2cset -f -y 1 0x2c 0xf6 0xff
root@trustbox:~# i2cdump -f -y 1 0x2c
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 36 38 49 53 44 20 20 20 02 00 86 00 00 01 00 00    68ISD   ?.?..?..
10: 26 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00    &.?.............
20: d0 02 00 00 e0 01 00 00 00 00 00 00 3e 80 00 00    ??..??......>?..
30: 06 80 00 00 3c 00 1e 00 10 00 09 00 00 00 00 00    ??..<.?.?.?.....
40: 55 15 00 00 80 00 5a 03 0d 02 7a 00 24 00 3e 80    U?..?.Z???z.$.>?
50: 06 80 d0 02 e0 01 00 00 40 e4 0c 01 11 00 10 28    ??????..@????.?(
60: a0 60 a4 00 20 06 00 00 00 00 00 00 00 00 00 00    ?`?. ?..........
70: 00 00 00 00 00 01 02 01 80 81 00 00 00 00 00 00    .....?????......
80: 00 00 00 00 00 00 00 00 00 1f 7c f0 c1 07 1f 7c    .........?|????|
90: f0 c1 07 24 22 10 01 04 01 00 00 00 00 00 00 00    ???$"????.......
a0: 01 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
b0: 04 78 ac ac 08 6c 9c 9c 0c 5c 5c 5c 0c 0c 0c 0c    ?x???l???\\\????
c0: 3f 3f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00    ???.............
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00    ....?...?.......

Mode 3 (720p) is blinking
Modeline "Mode 3" 74.250 1280 1390 1420 1650 720 725 730 750 +hsync +vsync

720p

root@trustbox:~# i2cset -f -y 1 0x2c 0xf6 0xff
root@trustbox:~# i2cdump -f -y 1 0x2c
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 36 38 49 53 44 20 20 20 02 00 86 00 00 01 00 00    68ISD   ?.?..?..
10: 26 00 2c 00 00 00 00 00 00 00 00 00 00 00 00 00    &.,.............
20: 00 05 00 00 d0 02 00 00 00 00 00 00 1e 00 00 00    .?..??......?...
30: 05 00 00 00 e6 00 14 00 6e 00 05 00 00 00 00 00    ?...?.?.n.?.....
40: ab 3a 00 00 80 00 72 06 ee 02 04 01 19 00 1e 00    ?:..?.r??????.?.
50: 05 00 00 05 d0 02 00 00 40 e4 0c 01 11 00 10 28    ?..???..@????.?(
60: a0 60 a4 00 20 06 06 06 00 00 00 00 00 00 00 00    ?`?. ???........
70: 00 00 00 00 00 01 02 01 80 81 77 00 00 00 00 00    .....?????w.....
80: 00 00 00 00 00 00 00 00 00 1f 7c f0 c1 07 1f 7c    .........?|????|
90: f0 c1 07 34 22 10 01 04 01 00 00 00 00 00 00 00    ???4"????.......
a0: 01 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
b0: 04 78 ac ac 08 6c 9c 9c 0c 5c 5c 5c 0c 0c 0c 0c    ?x???l???\\\????
c0: 3f 3f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00    ???.............
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 02 00 00 00 01 00 47 00 01 00 00 00 00 00 00 00    ?...?.G.?.......

Mode 1 (1080p) doesn't work at all
Modeline "Mode 1" 148.500 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync

1080p

root@trustbox:~# i2cset -f -y 1 0x2c 0xf6 0xff
root@trustbox:~# i2cdump -f -y 1 0x2c
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 36 38 49 53 44 20 20 20 02 00 86 00 00 01 00 00    68ISD   ?.?..?..
10: 26 00 58 00 00 00 00 00 00 00 00 00 00 00 00 00    &.X.............
20: 80 07 00 00 38 04 00 00 00 00 00 00 2c 00 00 00    ??..8?......,...
30: 05 00 00 00 94 00 24 00 58 00 04 00 00 00 00 00    ?...?.$.X.?.....
40: 66 46 00 00 80 00 98 08 65 04 c0 00 29 00 2c 00    fF..?.??e??.).,.
50: 05 00 80 07 38 04 00 00 40 e4 0c 01 11 00 10 28    ?.??8?..@????.?(
60: a0 60 a4 00 20 06 00 00 00 00 00 00 00 00 00 00    ?`?. ?..........
70: 00 00 00 00 00 01 02 01 80 81 00 00 00 00 00 00    .....?????......
80: 00 00 00 00 00 00 00 00 00 1f 7c f0 c1 07 1f 7c    .........?|????|
90: f0 c1 07 24 82 10 01 04 01 00 00 00 00 00 00 00    ???$?????.......
a0: 01 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
b0: 04 78 ac ac 08 6c 9c 9c 0c 5c 5c 5c 0c 0c 0c 0c    ?x???l???\\\????
c0: 3f 3f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00    ???.............
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 02 00 00 00 01 00 47 00 01 00 00 00 00 00 00 00    ?...?.G.?.......

Hello, 

Thank you for including this. Are you using 18bpp or 24bpp? The timing/frequency registers look to be configured for 24bpp, but register 0x5b is set to 01. This indicates that 18bpp format will be transmitted. If you are using 18bpp, then the DSI clock frequency register values need to be adjusted.

Best, Allison

Hello,
Thank you for answer.

Yes, we use 24bpp and have tried to set 24bpp in register 0x5b, but it doesn't help (errors still appear on DSI bus).

By the way, if in mode 3 (720p), which is blinking ("Mode 3" 74,250 1280 1390 1420 1650 720 725 730 750 +hsync +vsync), increase the pixel frequency from 74250 to 75250, mode 3 (720p) starts to work well.
But that triсk doesn't work for Mode 1 (1080p "Mode 1" 148.500 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync), maybe because 148.500 pixel freq is the maximum frequency for Renesas SoC.

Best, Aliaksandr

Hello,

For Mode 1, 1080p, can you change register 12 from 58 to 59?

DSI CLK frequency = pixel clock x bpp / (2 x #DSI data lanes). For Mode 1 (1080p), DSI CLK frequency is 445.5MHz, which would indicate that register 12 needs to be configured for the 445-450MHz frequency range. 

Thanks, Allison

Hello,

I have tried to change register 0x12 from 0x58 to 0x59 for Mode 1, 1080p, but that doesn't help. Even more, I have tried to use default value in register 0x12, because in datasheet was written "If the CHA_DSI_CLK_RANGE is not loaded before receiving the first DSI packet, the SN65DSIx6 uses the first packet to estimate the DSI_CLK frequency and loads this field with this estimate.Any non-zero value written by the host is used instead of the automatically-estimated value. ", but that doesn't help either.

Father more, we have two 480p modes and both modes were read from EDID of HP monitor:
"Mode 6" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
"Mode 9" 25.200 640 656 752 800 480 490 492 525 -hsync -vsync

Mode 6 works well, but mode 9 doesn't work until we increase the pixel clock frequency from 25.200 to 26.200. If we use 25.200 pixel frequency, we get the same error flags (DPTL_UNEXPECTED_VSYNC_ERR, DPTL_UNEXPECTED_HSYNC_ERR, DPTL_UNEXPECTED_PIXEL_DATA_ERR, LOSS_OF_DP_SYNC_LOCK_ERR, CHA_SOT_SYNC_ERR.)

Best, Aliaksandr.

Aliaksandr

Can you please send me the Mode 9 EDID?

Thanks

David

Hello,

Full parsed EDID and binary file:

% cat hp-edid.bin | parse-edid                                     
Checksum Correct

Section "Monitor"
    Identifier "HP V241ib"
    ModelName "HP V241ib"
    VendorName "HPN"
    # Monitor Manufactured week 35 of 2021
    # EDID version 1.3
    # Digital Display
    DisplaySize 530 310
    Gamma 2.20
    Option "DPMS" "true"
    Horizsync 30-80
    VertRefresh 50-60
    # Maximum pixel clock is 170MHz
    #Not giving standard mode: 1920x1080, 60Hz
    #Not giving standard mode: 1600x900, 60Hz
    #Not giving standard mode: 1280x720, 60Hz
    #Not giving standard mode: 1680x1050, 60Hz
    #Not giving standard mode: 1440x900, 60Hz
    #Not giving standard mode: 1280x800, 60Hz
    #Not giving standard mode: 1280x1024, 60Hz


    #Extension block found. Parsing...
    Modeline     "Mode 10" +hsync +vsync 
    Modeline     "Mode 0" +hsync +vsync 
    Modeline     "Mode 1" 148.500 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync
    Modeline     "Mode 2" 148.500 1920 2448 2492 2640 1080 1084 1089 1125 +hsync +vsync
    Modeline     "Mode 3" 74.250 1280 1390 1420 1650 720 725 730 750 +hsync +vsync
    Modeline     "Mode 4" 74.250 1280 1720 1760 1980 720 725 730 750 +hsync +vsync
    Modeline     "Mode 5" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
    Modeline     "Mode 6" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
    Modeline     "Mode 7" 27.000 720 732 796 864 576 581 586 625 -hsync -vsync
    Modeline     "Mode 8" 27.000 720 732 796 864 576 581 586 625 -hsync -vsync
    Modeline     "Mode 9" 25.200 640 656 752 800 480 490 492 525 -hsync -vsync
    Modeline     "Mode 11" +hsync +vsync 
    Modeline     "Mode 12" -hsync -vsync 
    Option "PreferredMode" "Mode 10"
EndSection                 

https://www.mediafire.com/file/tithkh7vyy9psjr/hp-edid.bin/file

Best, Aliaksandr

Aliaksandr

Can you attach the bin file directly to this e2e thread? TI network blocks me from accessing it. 

Basically I am trying to input the EDID into this spreadsheet, https://e2e.ti.com/support/interface-group/interface/f/interface-forum/945404/faq-sn65dsi86-how-do-i-programming-the-sn65dsi86-registers, and double check the DSI86 programming value against the value given by the spreadsheet.

Also what is your DSI CLK frequency? Are you running it at 445.5MHz for Mode 1 1080p?

Thanks

David

David,

Yes, DSI CLK frequency is 445.5MHz for Mode 1 1080p, but it doesn't work.

I have checked the DSI86 programming value against the value given by the spreadsheet and they are the same.

I can't add binary file to e2e thread, because there is no option on this forum to do so. I can Inset image or video, but can't binary.
Let's try another service
https://we.tl/t-PDfUeHwqjP

or this way

cat hp-edid.bin | xxd 
00000000: 00ff ffff ffff ff00 220e 8437 0000 0000  ........"..7....
00000010: 231f 0103 8035 1f78 2ad2 35a5 5651 9d27  #....5.x*.5.VQ.'
00000020: 0d50 54a1 0800 d1c0 a9c0 81c0 b300 9500  .PT.............
00000030: 8100 8180 0101 023a 8018 7138 2d40 582c  .......:..q8-@X,
00000040: 4500 0f28 2100 001e 0000 00fd 0032 3c1e  E..(!........2<.
00000050: 5011 000a 2020 2020 2020 0000 00fc 0048  P...      .....H
00000060: 5020 5632 3431 6962 0a20 2020 0000 00ff  P V241ib.   ....
00000070: 0033 4351 3133 3531 4834 560a 2020 0187  .3CQ1351H4V.  ..
00000080: 0203 19b1 4990 1f04 1302 0311 1201 6703  ....I.........g.
00000090: 0c00 1000 0022 e200 eb02 3a80 1871 382d  ....."....:..q8-
000000a0: 4058 2c45 000f 2821 0000 1e01 1d00 7251  @X,E..(!......rQ
000000b0: d01e 206e 2855 000f 2821 0000 1e8c 0ad0  .. n(U..(!......
000000c0: 8a20 e02d 1010 3e96 000f 2821 0000 1800  . .-..>...(!....
000000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
000000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
000000f0: 0000 0000 0000 0000 0000 0000 0000 008a  ................

Best, Aliaksandr.

Aliaksandr

Can you use this link to upload the binary file, https://txn.box.com/s/8ounsgss2fb93hy0c6uusn5wvtuhte7x?

From the register dump, I assume you are using a 27MHz external reference clock, are you running the DSI clock in HS continuous mode? 

Thanks

David

David,

Sorry, but I can't upload files using your link.

Yes, we are using 27MHz external ref clock.I checked both options and tried to run DSI clock in HS non-continuous mode and in HS continuous mode.

Best, Aliaksandr

Aliaksandr

Can you use Google drive to upload the EDID file?

With the same time scale as this capture, can you put the scope into persistence mode, and see if HSYNC is coming out every 67.5KHz?

Thanks
David

Hello, David.

Ok. We can try with Google drive https://drive.google.com/file/d/1PbUMf8JIPHymMZ_962GIZgk-ZVDiYLDK/view?usp=sharing

We did that. HSYNC  persistent mode, for 1080p

HSYNC= 67.5KHz for 1080p

Best, Aliaksandr

Hi Aliaksandr,

Can you please try the below register values for 1080p:

<aardvark>
<configure i2c=1 spi=1 gpio=0 tpower=1 pullups=0/>
<i2c_bitrate khz=100/>

======ASSR RW control ======
<i2c_write addr=0x2D count=1 radix=16> FF 7 </i2c_write>/>
<i2c_write addr=0x2D count=1 radix=16> 16 1 </i2c_write>/>
<i2c_write addr=0x2D count=1 radix=16> FF 0 </i2c_write>/>

======REFCLK Frequency ======
<i2c_write addr=0x2D count=1 radix=16> 0A 6 </i2c_write>/>

======DSI Mode ======
<i2c_write addr=0x2D count=1 radix=16> 10 26 </i2c_write>/>

======DSIA Clock ======
<i2c_write addr=0x2D count=1 radix=16> 12 59 </i2c_write>/>

======DSIB Clock ======
<i2c_write addr=0x2D count=1 radix=16> 13 59 </i2c_write>/>

======DP Datarate ======
<i2c_write addr=0x2D count=1 radix=16> 94 80 </i2c_write>/>

======Enable PLL ======
<i2c_write addr=0x2D count=1 radix=16> 0D 1 </i2c_write> <sleep ms=10/>

======Enable enhanced frame in DSI86 ======
<i2c_write addr=0x2D count=1 radix=16> 5A 4 </i2c_write>/>

======Number of DP lanes ======
<i2c_write addr=0x2D count=1 radix=16> 93 20 </i2c_write>/>

======Start Semi-Auto Link Training ======
<i2c_write addr=0x2D count=1 radix=16> 96 0A </i2c_write> <sleep ms=20/>

======CHA Active Line Length ======
<i2c_write addr=0x2D count=2 radix=16> 20 80 07 </i2c_write>/>

======CHB Active Line Length ======
<i2c_write addr=0x2D count=2 radix=16> 22 0 0 </i2c_write>/>

======Vertical Active Size ======
<i2c_write addr=0x2D count=2 radix=16> 24 38 04 </i2c_write>/>

======Horizontal Pulse Width ======
<i2c_write addr=0x2D count=2 radix=16> 2C 2C 00 </i2c_write>/>

======Vertical Pulse Width ======
<i2c_write addr=0x2D count=2 radix=16> 30 05 00 </i2c_write>/>

======HBP ======
<i2c_write addr=0x2D count=1 radix=16> 34 94 </i2c_write>/>

======VBP ======
<i2c_write addr=0x2D count=1 radix=16> 36 24 </i2c_write>/>

===== HFP ======
<i2c_write addr=0x2D count=1 radix=16> 38 58 </i2c_write>/>

===== VFP ======
<i2c_write addr=0x2D count=1 radix=16> 3A 04 </i2c_write>/>

===== DP-18BPP Disable ======
<i2c_write addr=0x2D count=1 radix=16> 5B 0 </i2c_write>/>

===== Color Bar Enable ======
<i2c_write addr=0x2D count=1 radix=16> 3C 02 </i2c_write>/>

===== Enhanced Frame, and Vstream Enable ======
<i2c_write addr=0x2D count=1 radix=16> 5A 0C </i2c_write>/>

</aardvark>

Best, Allison

Hi,

I have the same values that you showed, but 1080p doesn't work and I get the same errors (DPTL_UNEXPECTED_VSYNC_ERR, DPTL_UNEXPECTED_HSYNC_ERR, DPTL_UNEXPECTED_PIXEL_DATA_ERR, LOSS_OF_DP_SYNC_LOCK_ERR, CHA_SOT_SYNC_ERR)

My i2c dump for 1080p mode:

root@trustbox:~# i2cdump -f -y 1 0x2c
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 36 38 49 53 44 20 20 20 02 00 86 00 00 01 00 00    68ISD   ?.?..?..
10: 26 00 59 59 00 00 00 00 00 00 00 00 00 00 00 00    &.YY............
20: 80 07 00 00 38 04 00 00 00 00 00 00 2c 00 00 00    ??..8?......,...
30: 05 00 00 00 94 00 24 00 58 00 04 00 00 00 00 00    ?...?.$.X.?.....
40: 66 46 00 00 80 00 98 08 65 04 c0 00 29 00 2c 00    fF..?.??e??.).,.
50: 05 00 80 07 38 04 20 00 40 e4 0c 00 11 00 70 00    ?.??8? .@??.?.p.
60: a0 60 a4 00 20 06 00 00 00 00 00 00 00 00 00 00    ?`?. ?..........
70: 00 00 00 00 00 01 02 01 80 81 00 00 00 00 00 00    .....?????......
80: 00 00 00 00 00 00 00 00 00 1f 7c f0 c1 07 1f 7c    .........?|????|
90: f0 c1 07 24 82 10 01 04 01 00 00 00 00 00 00 00    ???$?????.......
a0: 01 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
b0: 04 78 ac ac 08 6c 9c 9c 0c 5c 5c 5c 0c 0c 0c 0c    ?x???l???\\\????
c0: 3f 3f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00    ???.............
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 02 00 00 00 01 00 47 00 01 00 00 00 00 00 00 00    ?...?.G.?.......

Best, Aliaksandr

Hi Aliaksandr,

Can you please ensure you're using the DSI Data Type shown in the table below?

Can you also measure the 27MHz clock that you are using and ensure it is running at the correct frequency? Also, can you share your schematic and layout for our review?

Thanks, Allison

HI,

We don't really have a way to check what DSI data types Resesas SoCs are using, but we do have two similar 480p modes ("Mode 6" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync and "Mode 9" 25.200 640 656 752 800 480 490 492 525 -hsync -vsync) and mode 6 works but mode 9 doesn't. I think both modes use the same DSI data types.

We tested the 27MHz clock and it runs at the correct frequency. Moreover, we tried 19.2 MHz and 38.4 MHz with the same result.

I can share this part of schematic:

Best ,Aliaksandr

Hi Aliaksandr,

The schematic looks OK, thanks for sharing it. Can you measure the HSYNC to VSYNC timing using a scope? You can map HSYNC and VSYNC to the GPIO pins. It would be helpful to know if HSYNC-VSYNC timing > HSYNC-HSYNC timing.

Thanks, Allison

Hello,
Thanks for answer.

I don't quite understand what that means "HSYNC-VSYNC timing > HSYNC-HSYNC timing". Could you please explain.
We measured the HSYNC and VSYNC from the bridge GPIO (yellow channel is VSYNC and violet channel is HSYNC). Both signals arrive at the same time.


Is that what you were asking about?

Best, Aliaksandr

Hi Aliaksandr,

Please refer to the picture below. Can you check if t2 > t1?

Best, Allison

Hi,

We see that both signals (HSYNC and VSYNC) occur synchronously (simultaneously). This is the bridge GPIOs output where yellow channel is VSYNC and violet channel is HSYNC

And we see the same picture with the working mode (like 480p) and with the non-working mode (like 1080p)

Best, Aliaksandr

Hi Aliaksandr,

Are you mapping both of the signals from GPIO2_CTRL and GPIO3_CTRL? GPIO2 is mapped to VSYNC only, and GPIO3 is mapped to VSYNC and HSYNC. The signals you are reading on the scope might be the same VSYNC signal. Can you trigger on the channel connected to GPIO2 and do single capture multiple times? Sometimes you will see VSYNC on both channels, but you should see distinct HSYNC and VSYNC signals eventually.

Best, Allison

Hi,
Thank you for support.
Additional Information what we have found.
For the non-working 480p (Mode 9), we found hsync skips.This happens about once every 1-2 seconds.

For working 480p (Mode 6) there are no  hsync skips.
It remains to find the reason why the hsync is skipped.

Best, Aliaksandr

Hi Aliaksandr,

Do you see these skips on the 720p and 1080p modes as well?

Thanks, Allison

Hi Allison,

Yes, we see skips on 720p and 1080p modes as well


We measured the HSYNC to VSYNC and HSYNC to HSYNC timing using a scope and saw that  t1 = t2 (like your picture above)
Picture with HSYNC to VSYNC

Picture with HSYNC to HSYNC

Best, Aliaksandr

Aliaksandr

Can you contact Resesas for support on how to program their DSI SOC? 

In Table 8-6 of the DSI86 datasheet, we need to make sure the timing between Horizontal Sync Start (HSS) is maintained. If you are seeing HSYNC skipping, then the SOC is not sending the HSYNC at a regular interval.

Thanks

David