Hello.
Regarding the single-ended clock in TCAN4550-Q1, when a single-ended clock is input to OSC1, how long should OSC2 be left GND (low) to switch to a single-ended clock input?
Also, how is the CAN output data affected if it is misidentified as a single-ended clock while operating with an external clock?
Is part of the CAN data missing as if it were fixed to HI or LOW, or is no CAN data generated and output?...
Is the waveform output from OSC1 temporarily disturbed at the timing of switching from external clock to single-ended clock input?