DS90UB948-Q1: DSI clock and data

Zoey Wu

Hi team，

my customer is using DS90UB948-Q1 and they want to know whether the DSI clock and data lane polarity can be inverted internally and independently for each of the ports like UB941? If 948 supports this, we can decrease the heat sink and improve the signal performance. Thanks!

over 2 years ago

0 Cameron Hoholik-Carlson over 2 years ago

TI__Expert 6716 points

Hi Zoey,

I looked through the register map and datasheet, and I haven't found anything saying DSI clock and data lane polarity swapping is a supported feature. I am going to look into this further tomorrow to double check, but I don't believe that is something you can do.

Best,

Cameron Carlson

0 Cameron Hoholik-Carlson over 2 years ago in reply to Cameron Hoholik-Carlson

TI__Expert 6716 points

Hi Zoey,

You mentioned that your customer wants to invert the polarity of the DSI clock and data lane, did you mean the LVDS clock and data lane? The 948 deserializer does not have a DSI clock and data lane, that is on the serializer side on the 941.

Best,

Cameron Carlson

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DS90UB948-Q1: DSI clock and data