DS250DF230: How to generate a PRBS signal?

Yingzheng Cui

Part Number: DS250DF230

Hi, I'm using the DS250DF230 chip, and I need to generate a 10.31G PRBS31 signal on the TX side. However, adjusting it according to "Programmer's guide(SNLU182D)" didn't work for me. So I wanted to ask how to adjust the registers to generate a PRBS signal on the CH0 TX side.
On the RX side, there is no signal input, and CAL_CLK_IN is connected to 25M/30.72M.
Can you please provide me with some support? Thank you.

//Set Data Rate
0x60,0xF6,0xFF,
0x61,0xA9,0xFF,
0x62,0xF6,0xFF,
0x63,0xA9,0xFF,
0x64,0xFF,0xFF,
0x09,0x04,0x04,
0x18,0x10,0x70,
0x0A,0x0C,0x0C,
0x0A,0x00,0x0C,
//Enable PRBS Generato
0x2E,0x04,0x04,
0x30,0x01,0x03,
0x1E,0x10,0x10,
0x79,0x00,0x20,
0x79,0x20,0x20,
0x30,0x00,0x08,
0x30,0x08,0x08,
0xA5,0x80,0xE0,

over 2 years ago

+1 Drew Miller1 over 2 years ago

TI__Mastermind 41908 points

Hi,

The DS250DF230 relies on CDR lock in order to generate PRBS data. In order to generate 10.3125 Gbps PRBS signal, you will need a 10.3125 Gbps (or subrate) signal input. One way to accomplish this is to use a subrate clock. For example you could try a 10.3125 Gbps / 8 = 1.2890625 GHz clock input.

Thanks,

Drew

0 Yingzheng Cui over 2 years ago in reply to Drew Miller1

Prodigy 10 points

Thank you for your reply. Can I understand it this way?
Without an input clock for the RX, it is not possible to generate PRBS data with only an external "CAL_CLK_IN" clock. 

+1 Drew Miller1 over 2 years ago in reply to Yingzheng Cui

TI__Mastermind 41908 points

Hi,

Apologies for the delay. Yes this is correct. The clock used to generate PRBS data is dependent on locking to a signal on the receiver.

Thanks,
Drew

0 Yingzheng Cui over 2 years ago in reply to Drew Miller1

Prodigy 10 points

Okay, I understand.
After inputting a 1.244G signal at the RX end, I am able to output a 9.953G PRBS code.
Thank you for your explanation.

Interface

Interface forum

DS250DF230: How to generate a PRBS signal?