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Original question:

DS90UB960-Q1: In case of the DS90UB953/DS90UB960 connection, what values should we set for the registers in the MIPI settings...

DS90UB960-Q1: The power-up sequence of some signals.

sugi shuichi
Prodigy 120 points
Part Number: DS90UB960-Q1
Other Parts Discussed in Thread: DS90UB953-Q1

Hi "FPD-LINK expert staff" in TI,

 We are working FPD-LINK on our system by using " DS90UB 953 and DS90UB 960".
And, we have a questions for "power up sequence on 960".

System condition;
 - Our system are connecting between DS90UB 953 and DS90UB 960.
 - The serializer clock setting is synchronous clocking mode.
 - "BC_FREQ_SELECT" setting is 50 Mbps (default for DS90UB953-Q1 compatibility)
 - Total cannel insertion loss is about " -6dB" at 2.0GHz"

Explanation ;
 Please see the Figure below. Here is "Power up sequence" on 960 datasheet. But I don't understand some timing on that one. So I want to make sure some timings on power up sequence.

Questions;

 Q1) Could you tell us about time at "Time (A) " in figure above.

   Ans1)


 Q2-1) Could you tell us about time at "Time (B) " in figure above.

    Ans2-1)


  And then, I thought that the Time (B) is 2.62ms. Because I saw table below on 960's datasheet.

 Q2-2)Is this above opinion correct or incorrect?

   Ans2-2)


Regards,
Shuichi Sugi,

  • 0
    TI__Intellectual 1450 points

    Hi Shuichi,

    Q1) Could you tell us about time at "Time (A)" in figure above.

    Ans1) "Time (A)" is illustrating the total lock time. The 953 locks to the back channel then generates the forward channel which is sent to the 960. The 960 locks to the forward channel. Let me check with my team on the 953 back channel receiver lock time.

    Q2-1) Could you tell us about time at "Time (B)" in the figure above.

    Ans2-1) "Time (B)" is showing the time it takes for the 960 to lock to the forward channel. Attached below is a screenshot from the 960 datasheet on the timing specs for lock.

    Q2-2) Is this above opinion correct or incorrect?

    Ans2-2) The above assumption is not correct. The 2.62 ms from the AEQ_CTL2 register is the amount of time to wait before incrementing the EQ. The EQ is incremented to open the eye so that the DES can lock to the forward channel.

    Best regards,

    Anthony

  • 0 in reply to Anthony Goldhawk
    Prodigy 120 points

    Hi Anthony,

     Thank you for good answering to me.

    Said to Anthony.
      Ans1) "Time (A)" is illustrating the total lock time. The 953 locks to the back channel then generates the forward channel which is sent to the 960. The 960 locks to the forward channel. Let me check with my team on the 953 back channel receiver lock time.

    I see. I'll waiting "953 back channel receiver lock time" from your team. Please reply it as soon as possible.

      ans2-1-1)

     

    Said to Anthony.
     Ans2-1) "Time (B)" is showing the time it takes for the 960 to lock to the forward channel. Attached below is a screenshot from the 960 datasheet on the timing specs for lock.

    I see. I wrote a time of "Time(B)" into a figure below. 

     (Q4) Is "Time(B)"  value below correct?

       ans4)

    Said to Anthony.

     Ans2-2) The above assumption is not correct. The 2.62 ms from the AEQ_CTL2 register is the amount of time to wait before incrementing the EQ. The EQ is incremented to open the eye so that the DES can lock to the forward channel.

    OK, I see.

     One more question. Please see the figure above.
     About ”Time(c)” on above figure. I think that it’s better to start ”remote I2C and 953 I2C” communication after both channel forward and back channels of "935 and 960" are locked.

    Q5) "Time(c)" has to need to be  " >0 (positive value)" . Is this idea correct?

    ans5)


    Thank you.

    Best Regards,
    Shuichi Sugi

  • 0 in reply to sugi shuichi
    TI__Intellectual 1450 points

    Hi Shuichi,

    The 953 back channel receiver lock time is typically about 60 ms.

    For time of "Time (B)" the 400 ms is the typical value. This lock time can vary. A good example of varying lock time would be using different cable lengths. A longer cable may require a slightly longer lock time while a shorter cable may require a slightly shorter lock time. In the case of different cable lengths, the lock time varies depending on EQ code needed.

    Yes to have bidirectional remote I2C and 953 I2C communication it is important to first establish lock between the 953 and 960.

    Lastly, yes "Time(C)" has to be ">0 (positive value)".

    I hope this helped answer all your questions.

    Best regards,

    Anthony

  • 0 in reply to Anthony Goldhawk
    Prodigy 120 points

    Hi Anthony,

     Thank you for answering to us.

     Our all question has been cleared with your help.

     Thank you .

    Best regards,
    Shuichi Sugi