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DS90UB948-Q1: The output PCLK is different form the PCLK set in ALP

Part Number: DS90UB948-Q1
Other Parts Discussed in Thread: ALP, USB2ANY

Hi Team

there is one question on FPDlink clock.

How can I calculate the real oLDI PCLK according to the PCLK set in ALP?

Use PC as host and USB2ANY connected to 948, use the pattern mode, set the PCLK in ALP to 40MHz the tested oLDI output is 27MHz, use the single port output mode of 948. 

You can see the setting in the picture below:

Thank you 

best regards

Joe

JUL 24

  • Hi Joe,

    Do you know what timing parameters the display you're connecting to has? Typically speaking the PCLK is calculated using the following formulas:

    H_BLANK + H_ACTIVE = H_TOTAL

    V_BLANK + V_ACTIVE = V_TOTAL

    H_TOTAL * V_TOTAL * REFRESH_RATE = PCLK

    Please let me know if you have any additional questions.

    Best,

    Cameron Carlson