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DS90UB940N-Q1: DS90UB940NT-Q1 Checksum Issue

Mohannad Alkouz
Prodigy 40 points
Part Number: DS90UB940N-Q1

Hi team,

A customer reported an issue with incorrect checksum values while using the DS90UB940NT-Q1 deserializer. I need to verify the failure on the returned unit.

  1. Can we detect the failure using the DS90UB940 Socket board and DS90UB949 EVM?
  2. Which register is responsible for checksum values?
  3. How to read HDCP_STS register?

Thanks,

  • 0
    TI__Mastermind 22946 points

    Hi Mohannad,

    What is the failure they are looking to detect? There are different error status and registers they can use to detect errors or loss of FPD-Link data.

    What checksum you are actually referring to? UB device is not capable of using HDCP, while UH device is capable of using HDCP.

    If you are saying DS90UH940N, please refer to HDCP_STS Register (0x4h) for RGB_CHKSUM_ERR.

    If you are saying DS90UH949, you need to look which register your are looking for checksum such as configuration, EDID, Audio, Audio Video, or RBG video line.

    Best,

    Josh

  • 0 in reply to Josh Baik
    TI__Prodigy 40 points

    Hi Josh, thanks for your reply. 

    The customer reported incorrect checksum values when comparing the displayed picture/video to the reference for UB940.

    I am currently seeking information on the registers that can be utilized to verify data integrity. The datasheet for the UB940 device indicates that checksum failures are reported in the HDCP_STS register. However, as you have mentioned, this register is only available for the UH940 device(HDCP capability). As such, I am attempting to determine the specific register that can be used to identify this error for the UB940 device.

  • +1 in reply to Mohannad Alkouz
    TI__Mastermind 22946 points

    Hi Mohannad,

    UB940 doesn't have any registers to verify data integrity as RGB_checksum is enabled through the HDCP transmitter. If you want to check FC checksum, I would recommend to use UH940.

    Best,

    Josh