DS90UB947-Q1: DS90UB947-Q1

Hi Yicheng,

I need more information about the setup:

1. Make a diagram of what the setup looks like. Are both Serilaizers connected to the 948 at the same time?

2. Is it single or dual link?

3. Can you send the register dump of the 941-948?

Best Regards,

Gil Abarca

HI,Abarca

1，my mean is the display panel's deserializers are 948,and the same resolution too.the panel can connect to 941 display port,also can connect to 947 port.

2,display panel deserializer--948 are dual link.it's mean 941 and 947 is also dual link.

3, this is 941-948's register, it's look, 948's back channel CRC error.but panel can display.

947: PAGE 10 and PAGE 14,have the detial register info? how can I use?

the best regards!

Hi,Abarca

    this my pannel's sch,pls check for me.the back channel crc error cause by hardware?BE11_128LCM _ 128LCM.pdf

947 init code:

{0x27, 0x01},
{0x03, 0xDA},  // I2C Pass all
{0x06, 0x58}, // DES ID
{0x07, 0x34}, //  Slave ID
{0x08, 0x34},  // Slave Alias
{0x0D, 0x03},  //GPIO0--PWM
{0x0E, 0x33},  //GPIO2--input,GPIO1--input
{0x0F, 0x03},  //GPIO3--input
{0xC6, 0x21},  //ICR
{0x5B, 0x0A},  //0x05},
{0x40, 0x10},
{0x41, 0x4A},
{0x42, 0x3F},
{0x41, 0x4B},
{0x42, 0x8A},
{0x41, 0x49},
{0x42, 0x10},
{0x42, 0x00},
{0x40, 0x14},
{0x41, 0x4A},
{0x42, 0x3F},
{0x41, 0x4B},
{0x42, 0x8A},
{0x41, 0x49},
{0x42, 0x10},
{0x42, 0x00},
// {0x01, 0x01},
{0x4F, 0x80},  //0x40},
{0x27, 0x00},

Analog register select Selects target for register access

000b: Disabled

001b - 011b: Reserved

100b: OLDI Registers

101b: FPD3 TX Registers

11xb: Reserved

 have any detail info for analog register?

HI Yicheng,

yicheng zhao said:

2,display panel deserializer--948 are dual link.it's mean 941 and 947 is also dual link

The register dump for your setup 947-948 shows that you have the setup as single link not dual link.

Please answer these questions:

1. What PCLK are you using?

2. Can you send the 941 and 947 Schematic?

3. Are you sending the same video to both serializers?

4. I noticed that you are setting and unsetting bit 1 on register 0x27 in the 947, why are you using this? We do not recommend doing this.

Best Regards,

Gil Abarca

1，LVDS clk  is 71.4M

2，schematic

BE11 _ LCM_V1.3.pdf

3,941-948,947-948,video all most is different, 941-948 is android laucher1, 947-948 is android launcher2.

4,I remove rigister27'initinal code,now 947-948 can display laucher2's test pictue.

  but ,948's back channel CRC ERROR is still. How can I solved the bug?

   Best Regurds!

register content.