Our implementation using TFP410 does not work with our target monitor but does work fine on most others. An HDMI protocol analyzer is showing that the TFP410 video is being detected as interlaced when it is transmitting 1080p60 RGB24. The parallel input to the TFP410 is configured as 1.8V I/O 24 bit single edge with a 148.5MHz single-ended clock input from a FPGA sending colorbars. Any ideas as to why it is being detected as interlaced?