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DP83822H: Forced Link Mode Side Effects

Part Number: DP83822H

Team, could you help with a couple questions of mine? 

We are interested in running the DP83822 PHY in a forced configuration (forced crossover, full duplex, 100Base-TX). While we understand the higher level implications of this, such as the need to properly configure the link partner, we wanted to inquire to see if we need to be considering less obvious effects. Below are a couple questions:

  • Are there any PHY DSP operations effected? The IEEE standard and datasheet don't provide much insight here, but it appears like the PHY is at least performing a couple tasks: Input and Baseline wander compensation, Digital Adaptive Equalization, Clock Recovery.
  • Which PHY DSP functions are performed only once on link up, if any? How does forcing the link impact these functions?
  • Are there any other implications or settings associated with forcing the link that we should be considering?

Regards,

Tom

  • Hi Tom,

    Using the DP83822 Ethernet PHY in a forced link mode is completely okay. Like you mentioned, just need to make sure the link partner is set at the same speed, MDIX, etc.

    Regards,

    Alvaro

  • Hey Alvaro, 

    Thank you for the response. That answers part of my question (it is ok to run in full forced mode). However, could you address the questions regarding how the PHY's DSP functions on this chip? Having this additional insight will allow us to more rigorously test our hardware to prove the robustness of the link. Additionally, could you clarify what you mean by Master/Slave? I don't believe that the master/slave concept exists for 100Base-TX, only for other standards like 1000Base-T.

    -Tom

  • Hi Tom,

    For Robust Link up we recommend auto neg.

    If you want 100 Mbps, we recommend keeping auto-neg on and de-advertising other modes (Write Reg 0x0001 = 6049)

    If using a forced mode and link is good, all DSP functions will be performed as usual. 

    Regards,

    Alvaro