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DP83848-EP: BIST precisions

Part Number: DP83848-EP

Hi,


I am planning on using a DP83848-EP for my project and I would like to have a few more details on the BIST functionality of this PHY.
So far I understood that to run the BIST, the following steps should be followed, thanks to this post: DP83848I : PHY - Test with BIST mode:

  1. Enable loopback mode (in my case, I wish to use Internal Loopback mode) by setting the LOOPBACK bit of BMCR register to 1
  2. (Optional) Set the bit PSR_15 in PHYCR to use 15 bit pseudo random sequence, instead of the default 9 bit sequence
  3. Start the BIST by setting the BIST_START bit of PHYCR register to 1
  4. Read the results by reading the BIST_STATUS bit of PHYCR, to check whether it is a 1(pass) or 0(fail)

My questions are the following:

  1. When and how does the DP83848-EP indicate that the BIST is over?
    The datasheet specifies that: "The pass/fail status of the BIST is stored in the BIST status bit in the PHYCR register. The status bit defaults to 0 (BIST fail) and will transition on a successful comparison.".
    Upon what condition will the BIST status bit transition from 0 to 1?
  2. Should the auto-negotiation be performed before or after the BIST? 
  3. What is "transmit VOD testing"?

Thank you in advance.

Best regards,
Ludovic

  • Hi Ludovic

    • When BIST pass means BIST has successfully run and the test will keep running unless you stop the BIST process or reset the PHY. BIST fail means BIST is not running successfully or If an error (mis-compare) occurs, the status bit is latched and is cleared upon a subsequent write to the Start/Stop bit. Register 0x0019 have further detail.
    • I don't think auto-negotiation need to be enable for the BIST test. Enable auto-negotiation before the BIST test should be fine.
    • Transmit VOD testing are only use for the compliance test.

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    Regards,

    Hillman Lin

  • Hi,

    Thank you very much for your answer.

    I understand the message of Patrick OFarrell in DP83848I : PHY - Test with BIST mode better: "Once you set the BIST_START bit in PHYCR, you should expect to see the BIST_STATUS bit set.  The BIST_STATUS bit should remain set as long as BIST is enabled."

    If I understood correctly, the user has to choose how long he wants the BIST to run then stop it himself and check the BIST_STATUS bit in PHYCR at the end to determine pass or fail, is that correct?

    Thank you in advance,

    Best regards,
    Ludovic

  • Hi Ludovic,

    Yes, you are correct on this statement.

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    Regards,

    Hillman Lin