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DS90UB954-Q1: Register 0x6D writing problem

Peter Xu
Expert 6020 points
Part Number: DS90UB954-Q1

Hi team,

My customer wants to write 0x6D [1:0] to change the running mode. 

However, they found a problem: When the default setting is RAW10, they write this register and the value does not change. It seems like it cannot be written.

And they change the default setting to CSI non-synchronous mode, and the register can be written! 

So they want to know the reason why they cannot write the register in RAW10 mode. Please give some comment on this, thanks.

Regards,

Peter

  • 0
    TI__Expert 6020 points

    Hi team,

    This is the background of the case: They use 953-954 in previous projects and they copy the schematic and layout to new project. The only difference is that in previous project they only use one port, but in new project they need to enable two ports. And they found that in new project, one 953 can lock normally and the other 953 cannot lock anymore. They want to know if the mode setting affects. So they change the register setting and pin setting to see if it can lock, and they found when 954 set to RAW10 mode, it cannot lock; and when 954 set to CSI2 non-sync mode, it can lock. 

    Then they want to write register 0x6D to lock the SERDES and found the register cannot be written in RAW10 mode. And they asked the problem I asked in this thread.

     

    Regards,

    Peter

  • 0 in reply to Peter Xu
    TI__Genius 11315 points

    Hi Peter,

    What modes are the two 953s strapped to? If the 953s are strapped to CSI-2 synchronous mode, the 954 should also be strapped to synchronous mode in order for the devices to lock. RAW10 mode is only used when 954 is paired with a DVP device such as 933 or 913A. 

    Are they selecting the port they want to read/write to using 0x4C before writing to 0x6D? 

    Regards,

    Cindy

  • 0 in reply to Cindy Li
    TI__Expert 6020 points

    Hi Cindy,

    Cindy Li said:
    What modes are the two 953s strapped to?

    It's both CSI-2 sync mode.

    Cindy Li said:
    Are they selecting the port they want to read/write to using 0x4C before writing to 0x6D? 

    I checked the datasheet yesterday and found this problem too, I already told them. They did not use 0x4C register, maybe it is the problem.

    Since their setting is RAW10, I think maybe they don't know whether these two serializers are all 953. It may be one 933/913 and one 953. Can 954 support this?

    Regards,

    Peter

  • +1 in reply to Peter Xu
    TI__Genius 11315 points

    Hi Peter,

    If both 953s are in sync mode, the 954 should be strapped to sync mode and not RAW10. This way you can LOCK without any register configuration. 

    Peter Xu said:
    Since their setting is RAW10, I think maybe they don't know whether these two serializers are all 953. It may be one 933/913 and one 953. Can 954 support this?

    954 can support this. Depending on how they configure the mode strap, they will have to change one of the ports through register configuration. For example, if the 954 is in CSI-2 sync mode, they should select the port with 933/913 using 0x4C. Then they should modify Reg 0x6D to change the mode and Reg 0x58 to change the back channel rate. The data type must be programmed in register 0x70 for RAW10 mode or 0x71 for RAW12 mode. 

    If they are planning to connect 953 or 933 on either port, ensure that the PoC networks are configured to support the entire frequency range. Also make sure the AC coupling capacitors on RIN+- work for both sync mode and DVP mode (see Typical Application section in datasheet). 

    Regards,

    Cindy

  • 0 in reply to Cindy Li
    TI__Expert 6020 points

    Hi Cindy,

    They finally find out that the serializers are one 933 and one 953. And they can lock both of them now. Thanks for your support!

    Regards,

    Peter

  • 0 in reply to Peter Xu
    TI__Genius 11315 points

    Hi Peter,

    No problem! I will close this thread now that it is resolved. 

    Regards,

    Cindy