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DS90UB948-Q1: do not output hs and vs signal in LVDS lane2

user6105554
Prodigy 151 points
Part Number: DS90UB948-Q1

Our 948 is used with 947, but the 948 end cannot measure hs and vs in LVDS lane2

does the 948 REG0x29 works? how it works? when set "DE only Mode", do 948 output LVDS without hs and vs?

FRC_CONTROL Register (Address = 0x29)

7 Timing_Mode_Select R/W 0x0 Select display timing mode
0: DE only Mode
1: Sync Mode (VS,HS)
6 HS_Polarity R/W 0x0 0: Active High
1: Active Low
5 VS_Polarity R/W 0x0 0: Active High
1: Active Low

If "Timing_Mode_Select " works in 947 external pattern mode?

If 947 input LVDS in dual-port LVDS mode, and one port LVDS with HS & VS and one port LVDS without HS&VS, can 947 correctly recognize this input timing?

  • 0
    TI__Mastermind 29335 points

    Hi,

    user6105554 said:
    Our 948 is used with 947, but the 948 end cannot measure hs and vs in LVDS lane2

    How are you measuring HD/VS signals?

    user6105554 said:
    does the 948 REG0x29 works? how it works? when set "DE only Mode", do 948 output LVDS without hs and vs?

    Yes this register works, but it's only applicable for image enhancement features such as white balance and dithering.

    user6105554 said:
    If "Timing_Mode_Select " works in 947 external pattern mode?

    It works for image enhancement features only. 

    user6105554 said:
    If 947 input LVDS in dual-port LVDS mode, and one port LVDS with HS & VS and one port LVDS without HS&VS, can 947 correctly recognize this input timing?

    No, LVDS ports need to be synchronized to a signal video source. 

    Regards,
    Fadi A.

  • 0 in reply to Fadi Abdulhameed
    Prodigy 151 points
          How are you measuring HD/VS signals?
               we display a black screen and use the oscilloscope differential probe to measure lane2

    Yes this register works, but it's only applicable for image enhancement features such as white balance and dithering.

            This meaning  works only when FRC1_Enable/FRC2_Enable is 1? Whether I use image enhancement or not, the output of 948 still exists. Does the output of 948 have hs and vs signals or not, in this condition? Or If HS and VS is always 0 in DE mode?

    No, LVDS ports need to be synchronized to a signal video source. 

             This means  947 need both port of LVDS lane2 with HS and VS ? If one of the port have no HS and VS(HS&VS always==0), but DE signal is OK, can Image correctly displayed in 948 ? In this condition, HS and VS outputs of Lane2 on one ports of 948 output are low? or the HS and VS outputs of Lane2 on both ports of 948 output are low?
  • 0 in reply to user6105554
    TI__Mastermind 29335 points

    Hi, 

    What issue are you having here? If you are having black screen issue, we can guide you through the debug steps to isolate the problem. For example, you could start with testing patgen from the 948 to display side and see if the issue occurs. Then you can move backwards and test patgen from the 947 side to see if any issue occurs. This way you could isolate whether your issue is coming from the video source side or the FPD-Link or OLDI side, etc. If you give you more details on the issue we can guide you through the debug. 

    user6105554 said:
    we display a black screen and use the oscilloscope differential probe to measure lane2

    Typically we recommend getting a FLINK board to break out the differential signal into the individual HS/VS/DE components then capture on a logic analyzer to get an extended period of capture rather than one single continues scope shot. Here is the board we typically use for this type of testing - Link 

    user6105554 said:
    the output of 948 have hs and vs signals or not, in this condition? Or If HS and VS is always 0 in DE mode?

    There is no sync mode or DE mode to configure on the 948. The 948 will pass on whatever signal it receives from the SER and recreate it at the output. The only option to choose between DE and Sync mode is for FRC control which doesn't impact the sync signals at output. If you aren't using FRC please ignore this register. 

    user6105554 said:
    can Image correctly displayed in 948 ? In this condition, HS and VS outputs of Lane2 on one ports of 948 output are low? or the HS and VS outputs of Lane2 on both ports of 948 output are low?

    Typically with 947, the video source will follow the standard OpenLDI Input Frame and Color Bit Mapping where the sync signals are carried on D2 and D6 lanes in dual input mode and the rest of the RGB bits are arranged depending on the bit mapping - Please refer to section (7.3.4 OpenLDI Input Frame and Color Bit Mapping Select) in the datasheet. 

    Regards,
    Fadi A.